Issued Patents All Time
Showing 26–50 of 50 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7849247 | Interrupt controller for accelerated interrupt handling in a data processing system and method thereof | Bryan D. Marietta, Gary L. Whisenhunt, Daniel L. Bouvier | 2010-12-07 |
| 7827360 | Cache locking device and methods thereof | Syed R. Rahman, David F. Greenberg, Kathryn C. Stacer, Klas Magnus Bruce, Matt B. Smittle +1 more | 2010-11-02 |
| 7805581 | Multiple address and arithmetic bit-mode data processing device and methods thereof | David C. Holloway, Trinh Huy Nguyen, Sergio Schuler, Gary L. Whisenhunt | 2010-09-28 |
| 7702881 | Method and system for data transfers across different address spaces | Becky Bruce, Gary L. Whisenhunt, Kumar K. Gala | 2010-04-20 |
| 7688656 | Integrated circuit memory having dynamically adjustable read margin and method therefor | Shayan Zhang, Hema Ramamurthy, Zheng Xu | 2010-03-30 |
| 7689815 | Debug instruction for use in a data processing system | William C. Moyer, Gary L. Whisenhunt | 2010-03-30 |
| 7681021 | Dynamic branch prediction using a wake value to enable low power mode for a predicted number of instruction fetches between a branch and a subsequent branch | Sergio Schuler, Leick D. Robinson, David Matthew Thompson | 2010-03-16 |
| 7675806 | Low voltage memory device and method thereof | Bradford Hunter, David Burnett, Troy L. Cooper, Prashant U. Kenkare, Ravindraj Ramaraju +2 more | 2010-03-09 |
| 7506105 | Prefetching using hashed program counter | Hassan F. Al-Sukhni, James C. Holt, Matt B. Smittle, Brian C. Grayson | 2009-03-17 |
| 7069384 | System and method for cache external writing and write shadowing | Magnus K. Bruce, Jamshed Jalal, Thomas Hoy | 2006-06-27 |
| 6842822 | System and method for cache external writing | Magnus K. Bruce, Jamshed Jalal, Thomas Hoy | 2005-01-11 |
| 6785772 | Data prefetching apparatus in a data processing system and method therefor | Suresh K. Venkumahanti | 2004-08-31 |
| 6581140 | Method and apparatus for improving access time in set-associative cache systems | Steven C. Sullivan, Magnus K. Bruce | 2003-06-17 |
| 6499116 | Performance of data stream touch events | Charles P. Roth | 2002-12-24 |
| 6321303 | Dynamically modifying queued transactions in a cache memory system | Thomas Hoy, Belliappa Kuttanna, Rajesh Patel | 2001-11-20 |
| 6311254 | Multiple store miss handling in a cache memory memory system | Belliappa Kuttanna, Rajesh Patel | 2001-10-30 |
| 6269427 | Multiple load miss handling in a cache memory system | Belliappa Kuttanna, Rajesh Patel | 2001-07-31 |
| 6240479 | Method and apparatus for transferring data on a split bus in a data processing system | David W. Todd, Brian K. Reynolds, Michael Garcia | 2001-05-29 |
| 6202130 | Data processing system for processing vector data and method therefor | Hunter Ledbetter Scales, III, Keith E. Diefendorff, Brett Olsson, Pradeep Kumar Dubey, Ronald Ray Hochsprung +4 more | 2001-03-13 |
| 6163835 | Method and apparatus for transferring data over a processor interface bus | David W. Todd, Brian K. Reynolds, Michael Garcia | 2000-12-19 |
| 6119203 | Mechanism for sharing data cache resources between data prefetch operations and normal load/store operations in a data processing system | Rajesh Patel | 2000-09-12 |
| 6073215 | Data processing system having a data prefetch mechanism and method therefor | — | 2000-06-06 |
| 5630095 | Method for use with a data coherency protocol allowing multiple snoop queries to a single snoop transaction and system therefor | — | 1997-05-13 |
| 5422914 | System and method for synchronizing data communications between two devices operating at different clock frequencies | — | 1995-06-06 |
| 4193064 | Multiple pulse timer | — | 1980-03-11 |