Issued Patents All Time
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10312345 | Transistor having a gate with a variable work function and method for manufacturing the same | Jinjuan Xiang, Xiaolei Wang, Hong Yang, Junfeng Li, Wenwu Wang +1 more | 2019-06-04 |
| 8917568 | Method of operating PSRAM and related memory device | Ho-Yin Chen | 2014-12-23 |
| 8755236 | Latch system applied to a plurality of banks of a memory circuit | Chun Shiah, Cheng-Nan Chang | 2014-06-17 |
| 8717841 | Method of controlling a refresh operation of PSRAM and related device | Ho-Yin Chen | 2014-05-06 |
| 8713386 | Device for increasing chip testing efficiency and method thereof | Sen-Fu Hong, Ho-Yin Chen | 2014-04-29 |
| 8543877 | Method of performing a chip burn-in scanning with increased efficiency | Wei-Ju Chen, Lien-Sheng Yang | 2013-09-24 |
| 8331178 | Memory device capable of operation in a burn in stress mode, method for performing burn in stress on a memory device, and method for detecting leakage current of a memory device | Tzu-Hao Chen, Te-Yi Yu, Ming-Hong Kuo | 2012-12-11 |
| 8223566 | Memory device and memory control method | Chun Shiah | 2012-07-17 |
| 7515669 | Dynamic input setup/hold time improvement architecture | Chun Shiah, Bor-Doou Rong | 2009-04-07 |
| 7478294 | Time controllable sensing scheme for sense amplifier in memory IC test | Bor-Doou Rong | 2009-01-13 |
| 6894917 | DRAM refresh scheme with flexible frequency for active and standby mode | Tah-Kang Joseph Ting, Chun Shiah | 2005-05-17 |
| 6661719 | Wafer level burn-in for memory integrated circuit | Jeng-Tzong Shih, Bor-Doou Rong | 2003-12-09 |
| 6643166 | Low power SRAM redundancy repair scheme | Tah-Kang Joseph Ting, Bor-Doou Rong | 2003-11-04 |
| 6366123 | Input buffer circuit for low power application | Jeng-Tzong Shih | 2002-04-02 |