Issued Patents All Time
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7927922 | Dice rearrangement package structure using layout process to form a compliant configuration | Yu-Ren Chen | 2011-04-19 |
| 7919358 | Method for fabricating multi-chip stacked package | Yu-Ren Chen | 2011-04-05 |
| 7915690 | Die rearrangement package structure using layout process to form a compliant configuration | — | 2011-03-29 |
| 7902649 | Leadframe for leadless package, structure and manufacturing method using the same | Chun-Ying Lin, Yu-Tang Pan, Shih-Wen Chou | 2011-03-08 |
| 7888783 | Chip package structure and the method thereof with adhering the chips to a frame and forming UBM layers | Yu-Ren Chen | 2011-02-15 |
| 7851270 | Manufacturing process for a chip package structure | Chun-Ying Lin | 2010-12-14 |
| 7851896 | Quad flat non-leaded chip package | Chun-Ying Lin, Shih-Wen Chou | 2010-12-14 |
| 7851262 | Manufacturing process for a chip package structure | Chun-Ying Lin | 2010-12-14 |
| 7847414 | Chip package structure | David W. Wang | 2010-12-07 |
| 7842550 | Method of fabricating quad flat non-leaded package | Chun-Ying Lin, Po-Kai Hou | 2010-11-30 |
| 7834432 | Chip package having asymmetric molding | Wu-Chang Tu | 2010-11-16 |
| 7816771 | Stacked chip package structure with leadframe having inner leads with transfer pad | Wu-Chang Tu | 2010-10-19 |
| 7803666 | Manufacturing process for a Quad Flat Non-leaded chip package structure | Chun-Ying Lin | 2010-09-28 |
| 7803667 | Manufacturing process for a quad flat non-leaded chip package structure | Chun-Ying Lin | 2010-09-28 |
| 7795079 | Manufacturing process for a quad flat non-leaded chip package structure | Chun-Ying Lin | 2010-09-14 |
| 7790514 | Manufacturing process for a chip package structure | Chun-Ying Lin | 2010-09-07 |
| 7786595 | Stacked chip package structure with leadframe having bus bar | Wu-Chang Tu | 2010-08-31 |
| 7749806 | Fabricating process of a chip package structure | David W. Wang | 2010-07-06 |
| 7700412 | Chip package structure and the method thereof with adhering the chips to a frame and forming UBM layers | Yu-Ren Chen | 2010-04-20 |
| 7696629 | Chip-stacked package structure | Chun-Ying Lin, Yu-Tang Pan, Shih-Wen Chou | 2010-04-13 |
| 7662667 | Die rearrangement package structure using layout process to form a compliant configuration | — | 2010-02-16 |
| 7663246 | Stacked chip packaging with heat sink structure | Yu-Ren Chen, Hung-Tsun Lin | 2010-02-16 |
| 7638880 | Chip package | David W. Wang | 2009-12-29 |
| 7615853 | Chip-stacked package structure having leadframe with multi-piece bus bar | Wu-Chang Tu | 2009-11-10 |
| 7576416 | Chip package having with asymmetric molding and turbulent plate downset design | Wu-Chang Tu | 2009-08-18 |