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Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
PT

Ping-Sheng Tseng — 19 Patents

ASAxis Systems: 9 patents #1 of 11Top 10%
CSCadence Design Systems: 7 patents #211 of 2,265Top 10%
SYSynopsys: 2 patents #669 of 2,302Top 30%
Sunnyvale, CA: #1,360 of 14,302 inventorsTop 10%
California: #31,067 of 386,348 inventorsTop 9%
Overall (All Time): #229,345 of 4,157,543Top 6%
19 Patents All Time
Ping-Sheng Tseng has been granted 19 US patents while listed as an inventor at Axis Systems. The first was granted in 1998 and the most recent in April 2022. Ping-Sheng Tseng ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list Ping-Sheng Tseng in Sunnyvale, CA, US.

Patents per Year

Patents granted per year, 1998 to 2022Bar chart with a peak of 3 patents in 2012.peak 31998: 2 patents19981999: 1 patents2000: 2 patents20002001: 1 patents2002: 1 patents20022003: 1 patents2004: 2 patents20042009: 2 patents2011: 1 patents20112012: 3 patents2015: 2 patents20152022: 1 patents2022

Issued Patents All Time

Showing 1–19 of 19 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11308008 Systems and methods for handling DPI messages outgoing from an emulator system Mitchell G. Poplack, Christian Wiencke, Bhoumik Shah 2022-04-19 $255,968,000
9195784 Common shared memory in a verification system Sharon Sheau-Pyng Lin, Quincy Kun-Hsu Shen, Mike Mon Yen Tsai, Steven Wang 2015-11-24 $10,256,000
9026966 Co-simulation methodology to address performance and runtime challenges of gate level simulations with, SDF timing using emulators Naresh Ramachandran, G. B. Ashok 2015-05-05 $4,700,000
8244512 Method and apparatus for simulating a circuit using timing insensitive glitch-free (TIGF) logic Sharon Sheau-Pyng Lin, Quincy Kun-Hsu Shen, Mike Mon Yen Tsai, Steven Wang 2012-08-14 $2,422,000
8161502 Method and apparatus for implementing a task-based interface in a logic verification system Song Peng, Quincy Kun-Hsu Shen 2012-04-17 $2,262,000
8161439 Method and apparatus for processing assertions in assertion-based verification of a logic design Amy Lim, Yogesh Goel 2012-04-17 $2,262,000
7991605 Method and apparatus for translating a verification process having recursion for implementation in a logic emulator Song Peng 2011-08-02 $3,104,000
7512728 Inter-chip communication system 2009-03-31
7480606 VCD-on-demand system and method Yogesh Goel, Kun-Hsu Shen 2009-01-20
6810442 Memory mapping system and method Sharon Sheau-Pyng Lin 2004-10-26
6785873 Emulation system with multiple asynchronous clocks 2004-08-31
6651225 Dynamic evaluation logic system and method Sharon Sheau-Pyng Lin, Chwen-Cher Chang, Su-Jen Hwang 2003-11-18
6389379 Converification system and method Sharon Sheau-Pyng Lin 2002-05-14
6321366 Timing-insensitive glitch-free logic system and method Sharon Sheau-Pyng Lin, Quincy Kun-Hsu Shen 2001-11-20
6134516 Simulation server system and method Steven Wang, Sharon Sheau-Pyng Lin, Ren-Song Tsay, Richard Yachyang Sun, Quincy Kun-Hsu Shen +1 more 2000-10-17
6026230 Memory simulation system and method Sharon Sheau-Pyng Lin 2000-02-15
6009256 Simulation/emulation system and method Sharon Sheau-Pyng Lin, Quincy Kun-Hsu Shen, Richard Yachyang Sun, Mike Mon Yen Tsai, Ren-Song Tsay +1 more 1999-12-28
5809283 Simulator for simulating systems including mixed triggers Radha Vaidyanathan 1998-09-15 $29,016,000
5784593 Simulator including process levelization Radha Vaidyanathan, Sivaram Krishna Nayudu, Mahadevan Ganapathi 1998-07-21 $30,016,000