Issued Patents All Time
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10192019 | Separation and minimum wire length constrained maze routing method and system | Fong-Yuan Chang, Sheng-Hsiung Chen, Wai-Kei Mak | 2019-01-29 |
| 9665679 | Systems and methods for designing integrated circuits with consideration of horizontal and vertical wiring demand ratios | Fong-Yuan Chang, Sheng-Hsiung Chen, Tung-Chieh Chen, Wai-Kei Mak | 2017-05-30 |
| 9195788 | Resource-oriented method of power analysis for embedded system | Tzu-Chi Huang | 2015-11-24 |
| 8875081 | Systems and methods for designing and making integrated circuits with consideration of wiring demand ratio | Fong-Yuan Chang, Sheng-Hsiung Chen, Tung-Chieh Chen, Wai-Kei Mak | 2014-10-28 |
| 8549468 | Method, system and computer readable storage device for generating software transaction-level modeling (TLM) model | Meng-Huan Wu | 2013-10-01 |
| 8423343 | High-parallelism synchronization approach for multi-core instruction-set simulation | Meng-Huan Wu | 2013-04-16 |
| 8407647 | Systems and methods for designing and making integrated circuits with consideration of wiring demand ratio | Fong-Yuan Chang, Sheng-Hsiung Chen, Tung-Chieh Chen, Wai-Kei Mak | 2013-03-26 |
| 8352924 | Method and device for multi-core instruction-set simulation | Meng-Huan Wu, Cheng-Yang Fu, Peng Wang | 2013-01-08 |
| 8336001 | Method for improving yield rate using redundant wire insertion | Fong-Yuan Chang, Wai-Kei Mak | 2012-12-18 |
| 6134516 | Simulation server system and method | Steven Wang, Ping-Sheng Tseng, Sharon Sheau-Pyng Lin, Richard Yachyang Sun, Quincy Kun-Hsu Shen +1 more | 2000-10-17 |
| 6009256 | Simulation/emulation system and method | Ping-Sheng Tseng, Sharon Sheau-Pyng Lin, Quincy Kun-Hsu Shen, Richard Yachyang Sun, Mike Mon Yen Tsai +1 more | 1999-12-28 |
| 5461576 | Electronic design automation tool for the design of a semiconductor integrated circuit chip | Chwen-Cher Chang | 1995-10-24 |