Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
NB

Nguyen Duc Bui — 21 Patents

AMD: 17 patents #672 of 9,280Top 8%
LSLattice Semiconductor: 4 patents #136 of 544Top 25%
San Jose, CA: #3,111 of 32,062 inventorsTop 10%
California: #27,449 of 386,348 inventorsTop 8%
Overall (All Time): #201,324 of 4,157,543Top 5%
21 Patents All Time
Nguyen Duc Bui has been granted 21 US patents while listed as an inventor at AMD. The first was granted in 1997 and the most recent in April 2022. Nguyen Duc Bui ranks #201,324 of 4,157,543 US inventors in our database (top 4.8%). Patent records list Nguyen Duc Bui in San Jose, CA, US.

Issued Patents All Time

Showing 1–21 of 21 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
11295825 Multi-time programmable non-volatile memory cell Farrokh Omid-Zohoor, Binh Ly 2022-04-05 $68,442,000
10217521 Multi-time programmable non-volatile memory cell Farrokh Omid-Zohoor, Binh Ly 2019-02-26 $17,560,000
6703305 Semiconductor device having metallized interconnect structure and method of fabrication Farrokh Omid-Zohoor 2004-03-09 $5,511,000
6700154 EEPROM cell with trench coupling capacitor Dainius A. Vidmantas, Richard Smoak 2004-03-02 $3,864,000
6472233 MOSFET test structure for capacitance-voltage measurements Khaled Ahmed, Effiong Ibok, John R. Hauser 2002-10-29 $1,498,000
6413820 Method of forming a composite interpoly gate dielectric 2002-07-02 $3,406,000
6329831 Method and apparatus for reliability testing of integrated circuit structures and devices Michael Anthony Niederhofer, Van-Hung Pham 2001-12-11 $6,262,000
6320391 Interconnection device for low and high current stress electromigration and correlation study 2001-11-20 $3,380,000
6163049 Method of forming a composite interpoly gate dielectric 2000-12-19 $3,857,000
6100101 Sensitive technique for metal-void detection Amit P. Marathe, Van-Hung Pham 2000-08-08 $4,885,000
6063662 Methods for forming a control gate apparatus in non-volatile memory semiconductor devices 2000-05-16 $14,024,000
6005409 Detection of process-induced damage on transistors in real time Chenming Hu, Donggun Park, Scott Zheng 1999-12-21 $3,429,000
5966024 Sensitive method of evaluating process induced damage in MOSFETs using a differential amplifier operational principle Scott Zheng 1999-10-12 $2,065,000
5808361 Intergrated circuit interconnect via structure having low resistance 1998-09-15 $3,221,000
5786705 Method for evaluating the effect of a barrier layer on electromigration for plug and non-plug interconnect systems John T. Yue, Van-Hung Pham 1998-07-28 $4,419,000
5726458 Hot carrier injection test structure and technique for statistical evaluation 1998-03-10 $9,720,000
5712510 Reduced electromigration interconnection line Donald L. Wollesen 1998-01-27 $6,963,000
5689139 Enhanced electromigration lifetime of metal interconnection lines Donald L. Wollesen 1997-11-18 $9,424,000
5650651 Plasma damage reduction device for sub-half micron technology 1997-07-22 $8,310,000
5612627 Method for evaluating the effect of a barrier layer on electromigration for plug and non-plug interconnect systems John T. Yue, Van-Hung Pham 1997-03-18 $11,685,000
5598009 Hot carrier injection test structure and testing technique for statistical evaluation 1997-01-28 $5,134,000