Issued Patents All Time
Showing 26–38 of 38 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6172895 | High capacity memory module with built-in-high-speed bus terminations | Weimin Shi, Thomas L. Sly | 2001-01-09 |
| 6147404 | Dual barrier and conductor deposition in a dual damascene process for semiconductors | Shekhar Pramanick, John A. Iacoponi | 2000-11-14 |
| 6146993 | Method for forming in-situ implanted semiconductor barrier layers | John A. Iacoponi | 2000-11-14 |
| 6143650 | Semiconductor interconnect interface processing by pulse laser anneal | Shekhar Pramanick, Takeshi Nogami | 2000-11-07 |
| 6144099 | Semiconductor metalization barrier | Sergey Lopatin, Shekhar Pramanick | 2000-11-07 |
| 6124203 | Method for forming conformal barrier layers | Young-Chang Joo, Simon S. Chan | 2000-09-26 |
| 6121141 | Method of forming a void free copper interconnects | Christy Mei-Chu Woo, Young-Chang Joo, Imran Hashim | 2000-09-19 |
| 6117770 | Method for implanting semiconductor conductive layers | Shekhar Pramanick, John A. Iacoponi, Christy Mei-Chu Woo | 2000-09-12 |
| 6103624 | Method of improving Cu damascene interconnect reliability by laser anneal before barrier polish | Takeshi Nogami, Sergey Lopatin | 2000-08-15 |
| 6080669 | Semiconductor interconnect interface processing by high pressure deposition | John A. Iacoponi, Takeshi Nogami | 2000-06-27 |
| 6066557 | Method for fabricating protected copper metallization | Todd P. Lukanc, Takeshi Nogami | 2000-05-23 |
| 6059940 | Method for fabricating dual layer protective barrier copper metallization | Takeshi Nogami | 2000-05-09 |
| 6022808 | Copper interconnect methodology for enhanced electromigration resistance | Takeshi Nogami, Shekhar Pramanick | 2000-02-08 |