Issued Patents All Time
Showing 76–100 of 160 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10592279 | Multi-processor apparatus and method of detection and acceleration of lagging tasks | Arkaprava Basu, Dmitri Yudanov, Mitesh R. Meswani, Sergey Blagodurov | 2020-03-17 |
| 10540200 | High performance context switching for virtualized FPGA accelerators | Kevin Y. Cheng, William C. Brantley | 2020-01-21 |
| 10515671 | Method and apparatus for reducing memory access latency | — | 2019-12-24 |
| 10515173 | Input-output processing on a remote integrated circuit chip | Dean E. Gonzales | 2019-12-24 |
| 10496561 | Resilient vertical stacked chip network for routing memory requests to a plurality of memory dies | Sudhanva Gurumurthi | 2019-12-03 |
| 10482043 | Nondeterministic memory access requests to non-volatile memory | Aaron Nygren, Michael Ignatowski | 2019-11-19 |
| 10452548 | Preemptive cache writeback with transaction support | Elliot H. Mednick | 2019-10-22 |
| 10447273 | Dynamic virtualized field-programmable gate array resource control for performance and reliability | Shenghsun Cho | 2019-10-15 |
| 10431305 | High-performance on-module caching architectures for non-volatile dual in-line memory module (NVDIMM) | Amin Farmahini Farahani | 2019-10-01 |
| 10402327 | Network-aware cache coherence protocol enhancement | Ehsan Fatehi | 2019-09-03 |
| 10365996 | Performance-aware and reliability-aware data placement for n-level heterogeneous memory systems | Manish Gupta, Mitesh R. Meswani, Vilas Sridharan, Steven Raasch, Daniel I. Lowell | 2019-07-30 |
| 10331537 | Waterfall counters and an application to architectural vulnerability factor estimation | Manish Gupta, Vilas Sridharan | 2019-06-25 |
| 10318153 | Techniques for changing management modes of multilevel memory hierarchy | Sergey Blagodurov, Mitesh R. Meswani, Gabriel H. Loh, Mauricio Breternitz, Mark Richard Nutter +3 more | 2019-06-11 |
| 10314087 | Wireless provisioning a device for a network using a soft access point | Yatharth Gupta | 2019-06-04 |
| 10310997 | System and method for dynamically allocating memory to hold pending write requests | Amin Farmahini Farahani, Nuwan Jayasena | 2019-06-04 |
| 10306539 | Wireless network host in silent mode | Hui Shen, Christopher D. Gual, Anirban Banerjee, Yi Lu, John W. Archer +3 more | 2019-05-28 |
| 10289413 | Hybrid analog-digital floating point number representation and arithmetic | Elliot H. Mednick, David John Cownie | 2019-05-14 |
| 10268416 | Method and systems of controlling memory-to-memory copy operations | Nuwan Jayasena | 2019-04-23 |
| 10255191 | Logical memory address regions | Amin Farmahini-Farahani | 2019-04-09 |
| 10248497 | Error detection and correction utilizing locally stored parity information | Prashant Jayaprakash Nair | 2019-04-02 |
| 10209991 | Instruction set and micro-architecture supporting asynchronous memory access | Meenakshi Sundaram Bhaskaran, Elliot H. Mednick, Anthony Asaro, Amin Farmahini-Farahani | 2019-02-19 |
| 10185498 | Write buffer design for high-latency memories | — | 2019-01-22 |
| 10164639 | Virtual FPGA management and optimization system | Andrew G. Kegel, Elliot H. Mednick | 2018-12-25 |
| 10152244 | Programmable memory command sequencer | — | 2018-12-11 |
| 10117281 | Wireless provisioning a device for a network using a soft access point | Yatharth Gupta | 2018-10-30 |