KC

Kangguo Cheng

IBM: 52 patents #5 of 3,866Top 1%
AS Adeia Semiconductor Solutions: 7 patents #1 of 44Top 3%
📍 Schenectady, NY: #1 of 75 inventorsTop 2%
🗺 New York: #3 of 9,062 inventorsTop 1%
Overall (2025): #190 of 469,880Top 1%
59
Patents 2025

Issued Patents 2025

Showing 1–25 of 59 patents

Patent #TitleCo-InventorsDate
12431469 Vertically stacked FET with strained channel Shogo Mochizuki, Juntao Li 2025-09-30
12432968 Nanowire source/drain formation for nanosheet device Ruilong Xie, Julien Frougier, Alexander Reznicek 2025-09-30
12426314 Strain generation and anchoring in gate-all-around field effect transistors Julien Frougier, Sung-Dae Suk, Andrew M. Greene, Ruilong Xie 2025-09-23
12426338 Buried power rail with robust connection to a wrap around contact Ruilong Xie, Julien Frougier, Chanro Park 2025-09-23
12419080 Semiconductor structure with wrapped-around backside contact Ruilong Xie, Chanro Park, Min Gyu Sung, Julien Frougier 2025-09-16
12414352 Two-dimensional vertical fins 2025-09-09
12407532 Gain cell memory based physically unclonable function 2025-09-02
12402403 Air gap spacer for metal gates Marc A. Bergendahl, Fee Li Lie, Eric R. Miller, John R. Sporre, Sean Teehan 2025-08-26
12402545 Stacked cross-point phase change memory Carl Radens, Ruilong Xie, Juntao Li 2025-08-26
12396247 Work function metal patterning for nanosheet CFETs Ruilong Xie, Chen Zhang, Juntao Li 2025-08-19
12396225 Method to release nano sheet after nano sheet fin recess Chanro Park, Ruilong Xie, Juntao Li, Choonghyun Lee 2025-08-19
12389813 Resistive switching memory cell Julien Frougier, Ruilong Xie, Chanro Park 2025-08-12
12389609 Circuit architecture using transistors with dynamic dual functionality for logic and embedded memory drivers Julien Frougier, Ruilong Xie, Heng Wu, Min Gyu Sung, Chanro Park 2025-08-12
12382665 Increased gate length at given footprint for nanosheet device Ruilong Xie, Julien Frougier, Chanro Park 2025-08-05
12382662 Wrap-around-contact for 2D-channel gate-all-around field-effect-transistors Julien Frougier, Ruilong Xie, Chanro Park, Andrew Gaul 2025-08-05
12382719 Power gating dummy power transistors for back side power delivery networks Tao Li, Ruilong Xie 2025-08-05
12382708 Vertical stacked nanosheet CMOS transistors with different work function metals Juntao Li, Ruilong Xie, Chanro Park 2025-08-05
12376369 FinFET devices Veeraraghavan S. Basker, Theodorus E. Standaert, Junli Wang 2025-07-29
12376503 Phase change material including deuterium Juntao Li, Arthur Roy Gasasira, LOUIS ZUOGUANG LIU, Amlan Majumdar 2025-07-29
12369379 Nanosheet transistor Juntao Li, Heng Wu, Peng Xu 2025-07-22
12369367 Bulk nanosheet with dielectric isolation Bruce B. Doris, Junli Wang 2025-07-22
12363977 Forming dielectric sidewall and bottom dielectric isolation in Fork-FET devices Julien Frougier, Ruilong Xie, Dimitri Houssameddine 2025-07-15
12356680 Nanosheet device with air-gaped source/drain regions Huimei Zhou, Yi Song, Ruilong Xie 2025-07-08
12349457 Stacked transistors having bottom contact with replacement spacer Ruilong Xie, Julien Frougier, Heng Wu 2025-07-01
12342738 Resistive memory for analog computing 2025-06-24