AG

Andrew M. Greene

IBM: 9 patents #56 of 3,866Top 2%
AS Adeia Semiconductor Solutions: 1 patents #10 of 44Top 25%
📍 Albany, NY: #3 of 157 inventorsTop 2%
🗺 New York: #90 of 9,062 inventorsTop 1%
Overall (2025): #6,543 of 469,880Top 2%
10
Patents 2025

Issued Patents 2025

Showing 1–10 of 10 patents

Patent #TitleCo-InventorsDate
RE50613 FinFET gate cut after dummy gate removal John R. Sporre, Siva Kanakasabapathy, Jeffrey C. Shearer, Nicole Saulnier 2025-09-30
12432960 Wraparound contact with reduced distance to channel Ruilong Xie, Reinaldo Vega, Yao Yao, Veeraraghavan S. Basker, Pietro Montanini +2 more 2025-09-30
12426314 Strain generation and anchoring in gate-all-around field effect transistors Julien Frougier, Sung-Dae Suk, Kangguo Cheng, Ruilong Xie 2025-09-23
12417944 Formation of trench silicide source or drain contacts without gate damage Ruilong Xie, Laertis Economikos, Veeraraghavan S. Basker, Chanro Park, Hui Zang 2025-09-16
12402391 Stressed material within gate cut region Huimei Zhou, Michael P. Belyansky, Oleg Gluschenkov, Robert R. Robison, Juntao Li +2 more 2025-08-26
12317555 Gate-all-around nanosheet field effect transistor integrated with fin field effect transistor Julien Frougier, Sagarika Mukesh, Ruqiang Bao, Jingyun Zhang, Nicolas Loubet +1 more 2025-05-27
12310054 Late replacement bottom isolation for nanosheet devices Ruilong Xie, Julien Frougier, Veeraraghavan S. Basker 2025-05-20
12255204 Vertical FET replacement gate formation with variable fin pitch Ruilong Xie, Yao Yao, Veeraraghavan S. Basker 2025-03-18
12249643 Stacked planar field effect transistors with 2D material channels Andrew Gaul, Julien Frougier, Ruilong Xie, Christopher J. Waskiewicz 2025-03-11
12224312 Field effect transistors with bottom dielectric isolation Julien Frougier, Ruilong Xie, Veeraraghavan S. Basker 2025-02-11