Issued Patents 2025
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417926 | Circuit interconnect structure | Fee Li Lie, Hosadurga Shobha, Devika Sarkar Grant | 2025-09-16 |
| 12394660 | Buried power rail after replacement metal gate | Devika Sarkar Grant, Kisik Choi, Somnath Ghosh, Ruilong Xie | 2025-08-19 |
| 12334398 | Multilayer dielectric stack for damascene top-via integration | Devika Sarkar Grant, Fee Li Lie, Shravan Kumar Matham, Hosadurga Shobha, Gauri Karve | 2025-06-17 |
| 12317555 | Gate-all-around nanosheet field effect transistor integrated with fin field effect transistor | Julien Frougier, Ruqiang Bao, Andrew M. Greene, Jingyun Zhang, Nicolas Loubet +1 more | 2025-05-27 |
| 12268031 | Backside power rails and power distribution network for density scaling | Ruilong Xie, Kisik Choi, Somnath Ghosh, Albert M. Chu, Albert M. Young +6 more | 2025-04-01 |
| 12243771 | Selective patterning of vias with hardmasks | John C. Arnold, Ashim Dutta, Dominik Metzler, Timothy Mathew Philip | 2025-03-04 |
| 12243913 | Self-aligned backside contact integration for transistors | Nikhil Jain, Devika Sarkar Grant, Prabudhya Roy Chowdhury, Ruilong Xie, Kisik Choi | 2025-03-04 |
| 12206722 | Correcting disruption of a network during a virtual meeting | John S. Werner, Arkadiy O. Tsfasman, Dong Hyun Kim | 2025-01-21 |