Issued Patents 2025
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417926 | Circuit interconnect structure | Sagarika Mukesh, Fee Li Lie, Hosadurga Shobha | 2025-09-16 |
| 12394660 | Buried power rail after replacement metal gate | Sagarika Mukesh, Kisik Choi, Somnath Ghosh, Ruilong Xie | 2025-08-19 |
| 12334398 | Multilayer dielectric stack for damascene top-via integration | Sagarika Mukesh, Fee Li Lie, Shravan Kumar Matham, Hosadurga Shobha, Gauri Karve | 2025-06-17 |
| 12243913 | Self-aligned backside contact integration for transistors | Nikhil Jain, Sagarika Mukesh, Prabudhya Roy Chowdhury, Ruilong Xie, Kisik Choi | 2025-03-04 |