| 12424549 |
Skip-level TSV with hybrid dielectric scheme for backside power delivery |
Nicholas Anthony Lanzillo, Ruilong Xie, Huai Huang, Lawrence A. Clevenger |
2025-09-23 |
| 12424557 |
Dual structured buried rail |
Huai Huang, Nicholas Anthony Lanzillo, Ruilong Xie, Lawrence A. Clevenger |
2025-09-23 |
| 12417926 |
Circuit interconnect structure |
Sagarika Mukesh, Fee Li Lie, Devika Sarkar Grant |
2025-09-16 |
| 12417963 |
Isolation rail between backside power rails |
Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Ruilong Xie, Baozhen Li |
2025-09-16 |
| 12412836 |
Backside power plane |
Ruilong Xie, Nicholas Anthony Lanzillo, Lawrence A. Clevenger, Huai Huang |
2025-09-09 |
| 12334398 |
Multilayer dielectric stack for damascene top-via integration |
Sagarika Mukesh, Devika Sarkar Grant, Fee Li Lie, Shravan Kumar Matham, Gauri Karve |
2025-06-17 |
| 12334442 |
Dielectric caps for power and signal line routing |
Nicholas Anthony Lanzillo, Ruilong Xie, Lawrence A. Clevenger, Huai Huang |
2025-06-17 |
| 12266607 |
Bottom barrier free interconnects without voids |
Kenneth Chun Kuen Cheng, Koichi Motoyama, Kisik Choi, Cornelius Brown Peethala, Joe Lee |
2025-04-01 |
| 12261056 |
Top via patterning using metal as hard mask and via conductor |
Nicholas Anthony Lanzillo, Huai Huang, Lawrence A. Clevenger, Chanro Park |
2025-03-25 |
| 12218003 |
Selective ILD deposition for fully aligned via with airgap |
Christopher J. Penny, Benjamin D. Briggs, Huai Huang, Lawrence A. Clevenger, Michael Rizzolo |
2025-02-04 |
