Issued Patents 2024
Showing 1–11 of 11 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12154842 | Heat dissipation structures for three-dimensional system on integrated chip structure | Po-Hsiang Huang, Chin-Her Chien, Fong-Yuan Chang, Hui Yu Lee | 2024-11-26 |
| 12079561 | Cell region including portion of conductor of another cell region and semiconductor device include the same | Fong-Yuan Chang, Sheng-Hsiung Chen, Po-Hsiang Huang | 2024-09-03 |
| 12062641 | Integrated circuit including a first semiconductor wafer and a second semiconductor wafer, semiconductor device including a first semiconductor wafer and a second semiconductor wafer and method of manufacturing same | Chih-Lin Chen, Hui Yu Lee, Fong-Yuan Chang, Po-Hsiang Huang | 2024-08-13 |
| 12039244 | Hybrid node chiplet stacking design | Jen-Yuan Chang, Jheng-Hong Jiang, Long Song Lin | 2024-07-16 |
| 12027513 | Layout design methodology for stacked devices | Fong-Yuan Chang, Po-Hsiang Huang, Chin-Her Chien, Ka Fai Chang | 2024-07-02 |
| 12009260 | Method and system of forming integrated circuit | Ka Fai Chang, Fong-Yuan Chang, Yi-Kan Cheng | 2024-06-11 |
| 12002776 | Interconnect structure and method for forming the same | Jung-Chou Tsai, Fong-Yuan Chang, Po-Hsiang Huang, Yi-Kan Cheng | 2024-06-04 |
| 11983475 | Method for manufacturing a cell having pins and semiconductor device based on same | Pin-Dai Sue, Po-Hsiang Huang, Fong-Yuan Chang, Chi-Yu Lu, Sheng-Hsiung Chen +4 more | 2024-05-14 |
| 11935894 | Integrated circuit device with improved layout | Fong-Yuan Chang, Chun-Chen Chen, Po-Hsiang Huang, Lee-Chung Lu, Chung-Te Lin +2 more | 2024-03-19 |
| 11923271 | 3D IC power grid | Noor Mohamed, Fong-Yuan Chang, Po-Hsiang Huang | 2024-03-05 |
| 11923302 | Semiconductor device and method of manufacture | Fong-Yuan Chang, Noor Mohamed Ettuveettil, Po-Hsiang Huang, Sen-Bor Jan, Ming-Fa Chen +1 more | 2024-03-05 |