Issued Patents 2024
Showing 1–25 of 29 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170113 | Concurrent programming of retired wordline cells with dummy data | Jeffrey S. McNeil, Kishore Kumar Muchherla, Sead Zildzic, Jonathan S. Parry, Violante Moschiano | 2024-12-17 |
| 12148474 | Apparatus and methods including source gates | Shafqat Ahmed, Khaled Hasnat, Krishna K. Parat | 2024-11-19 |
| 12131028 | Programming selective word lines during an erase operation in a memory device | Jeffrey S. McNeil, Jonathan S. Parry, Ugo Russo, Kishore Kumar Muchherla, Violante Moschiano +2 more | 2024-10-29 |
| 12132116 | Apparatuses including multiple channel materials within a tier stack | Marc Aoulaiche | 2024-10-29 |
| 12131788 | Read counter adjustment for delaying read disturb scans | Nicola Ciocchini, Animesh Chowdhury, Kishore Kumar Muchherla, Jung Sheng Hoei, Niccolo' Righetti +1 more | 2024-10-29 |
| 12131060 | Quick charge loss mitigation using two-pass controlled delay | Kishore Kumar Muchherla, Dung Viet Nguyen, Dave Scott Ebsen, Tomoharu Tanaka, James Fitzpatrick +2 more | 2024-10-29 |
| 12099725 | Code rate as function of logical saturation | Kishore Kumar Muchherla, Mustafa N. Kaynak, Jonathan S. Parry, Sivagnanam Parthasarathy | 2024-09-24 |
| 12100454 | Memory device including in-tier driver circuit | Jun Fujiki, Yoshiaki Fukuzumi | 2024-09-24 |
| 12086028 | Reduction of errors in data retrieved from a memory device to apply an error correction code of a predetermined code rate | Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Mustafa N. Kaynak | 2024-09-10 |
| 12080700 | Microelectronic devices including control logic regions | Aaron Yip, Kunal R. Parekh | 2024-09-03 |
| 12079517 | Buffer allocation for reducing block transit penalty | Kishore Kumar Muchherla, Peter Feeley, Jiangli Zhu, Fangfang Zhu, Lakshmi Kalpana Vakati +3 more | 2024-09-03 |
| 12068034 | Two-pass corrective programming for memory cells that store multiple bits and power loss management for two-pass corrective programming | Kishore Kumar Muchherla, Huai-Yuan Tseng, Giovanni Maria Paolucci, Dave Scott Ebsen, James Fitzpatrick +5 more | 2024-08-20 |
| 12068272 | Microelectronic devices having a memory array region, a control logic region, and signal routing structures | Kunal R. Parekh, Aaron Yip | 2024-08-20 |
| 12067290 | On-die cross-temperature management for a memory device | Kishore Kumar Muchherla, Violante Moschiano, Jeffrey S. McNeil, Jung Sheng Hoei, Sivagnanam Parthasarathy +2 more | 2024-08-20 |
| 12062396 | Memory devices having source lines directly coupled to body regions and methods | — | 2024-08-13 |
| 12051479 | Memory block programming using defectivity information | Kishore Kumar Muchherla, Dave Scott Ebsen, Lakshmi Kalpana Vakati, Jiangli Zhu, Peter Feeley +3 more | 2024-07-30 |
| 12029039 | Integrated structures comprising vertical channel material and having conductively-doped semiconductor material directly against lower sidewalls of the channel material | Guangyu Huang, Haitao Liu, Chandra Mouli, Justin B. Dorhout, Sanh D. Tang | 2024-07-02 |
| 12026052 | Partitioned memory having error detection capability | Kishore Kumar Muchherla, Niccolo' Righetti, Jeffrey S. McNeil, Todd A. Marquart, Mark A. Helm +4 more | 2024-07-02 |
| 12019557 | Padding cached data with valid data for memory flush commands | Kishore Kumar Muchherla, Jonathan S. Parry | 2024-06-25 |
| 12001721 | Multiple-pass programming of memory cells using temporary parity generation | Kishore Kumar Muchherla, Lakshmi Kalpana Vakati, Dave Scott Ebsen, Peter Feeley, Sanjay Subbarao +3 more | 2024-06-04 |
| 11994947 | Multi-layer code rate architecture for special event protection with reduced performance penalty | Kishore Kumar Muchherla, Huai-Yuan Tseng, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Jonathan S. Parry | 2024-05-28 |
| 11960722 | Memory device programming technique for increased bits per cell | Tomoharu Tanaka, Huai-Yuan Tseng, Dung Viet Nguyen, Kishore Kumar Muchherla, Eric N. Lee +2 more | 2024-04-16 |
| 11943919 | Microelectronic devices including two-dimensional materials, and related memory devices and electronic systems | Kamal M. Karda, Sanh D. Tang, Gurtej S. Sandhu, Litao Yang, Haitao Liu | 2024-03-26 |
| 11935853 | Memory devices with backside bond pads under a memory array | Eric N. Lee | 2024-03-19 |
| 11922029 | Modified read counter incrementing scheme in a memory sub-system | Kishore Kumar Muchherla, Jonathan S. Parry, Nicola Ciocchini, Animesh Chowdhury, Jung Sheng Hoei +2 more | 2024-03-05 |