Issued Patents 2024
Showing 25 most recent of 41 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170113 | Concurrent programming of retired wordline cells with dummy data | Jeffrey S. McNeil, Kishore Kumar Muchherla, Sead Zildzic, Akira Goda, Violante Moschiano | 2024-12-17 |
| 12169648 | Caching for multiple-level memory device | Reshmi Basu, Nitul Gohain | 2024-12-17 |
| 12153827 | Non-volatile memory module architecture to support memory error correction | George E. Pax | 2024-11-26 |
| 12147702 | Host training indication for memory artificial intelligence | Nicolas Soberanes, Ezra E. Hartz, Bruce J. Ford, Joseph A. De La Cerda, Benjamin C. Rivera | 2024-11-19 |
| 12135887 | Sequential data optimized sub-regions in storage devices | David Aaron Palmer, Sean L. Manion, Stephen Hanna, Qing Liang, Nadav Grosz +2 more | 2024-11-05 |
| 12131028 | Programming selective word lines during an erase operation in a memory device | Jeffrey S. McNeil, Ugo Russo, Akira Goda, Kishore Kumar Muchherla, Violante Moschiano +2 more | 2024-10-29 |
| 12132832 | Secure key update for replay protected memory blocks | Giuseppe Cariello, Gaspare Giglio, Patrick Miesen | 2024-10-29 |
| 12131788 | Read counter adjustment for delaying read disturb scans | Nicola Ciocchini, Animesh Chowdhury, Kishore Kumar Muchherla, Akira Goda, Jung Sheng Hoei +1 more | 2024-10-29 |
| 12124322 | Access operation status signaling for memory systems | Qing Liang, Giuseppe Cariello, Deping He | 2024-10-22 |
| 12111724 | Redundant array management techniques | Chun Sum Yeung, Deping He, Xiangang Luo, Reshmi Basu | 2024-10-08 |
| 12105967 | Two-tier defect scan management | Kishore Kumar Muchherla, Robert Loren O. Ursua, Sead Zildzic, Eric N. Lee, Lakshmi Kalpana Vakati +1 more | 2024-10-01 |
| 12099725 | Code rate as function of logical saturation | Kishore Kumar Muchherla, Mustafa N. Kaynak, Sivagnanam Parthasarathy, Akira Goda | 2024-09-24 |
| 12099449 | Using a flag to indicate whether a mapping entry points to sequentially stored data | Giuseppe Cariello | 2024-09-24 |
| 12086077 | Increased efficiency obfuscated logical-to-physical map management | Nadav Grosz | 2024-09-10 |
| 12086027 | Methods and system with dynamic ECC voltage and frequency | Nadav Grosz, David Aaron Palmer, Christian M. Gyllenskog | 2024-09-10 |
| 12079481 | Memory block erase protocol | Chun Sum Yeung, Deping He, Ting Luo, Guang Hu | 2024-09-03 |
| 12079479 | Memory device with multiple input/output interfaces | Chang Hua Siau | 2024-09-03 |
| 12056518 | Notifying memory system of host events via modulated reset signals | Qing Liang, Kulachet Tanpairoj, Stephen Hanna | 2024-08-06 |
| 12050773 | Completion flag for memory operations | Giuseppe Cariello | 2024-07-30 |
| 12019557 | Padding cached data with valid data for memory flush commands | Kishore Kumar Muchherla, Akira Goda | 2024-06-25 |
| 12019884 | Identification and storage of boot information at a memory system | Luca Porzio, Roberto Izzi, Christian M. Gyllenskog, Giuseppe Cariello, Reshmi Basu | 2024-06-25 |
| 12007903 | Dual address encoding for logical-to-physical mapping | Giuseppe Cariello | 2024-06-11 |
| 12002531 | Techniques for retiring blocks of a memory system | Deping He, Chun Sum Yeung | 2024-06-04 |
| 12001358 | Status check using signaling from a memory device | Reshmi Basu | 2024-06-04 |
| 11995353 | Storing parity during refresh operations | Reshmi Basu | 2024-05-28 |