Issued Patents 2024
Showing 1–18 of 18 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12170113 | Concurrent programming of retired wordline cells with dummy data | Jeffrey S. McNeil, Kishore Kumar Muchherla, Sead Zildzic, Akira Goda, Jonathan S. Parry | 2024-12-17 |
| 12148466 | Determining soft data | Andrea D'Alessandro, Andrea Giovanni Xotta | 2024-11-19 |
| 12142318 | Redundancy and majority voting in a key-value data storage system using content addressable memory | Tyler L. Betz, Manik Advani, Tomoko Ogura Iwasaki | 2024-11-12 |
| 12141437 | Program command generation with dummy data generation at a memory device | Jeremy Binfet, James Fitzpatrick, Kishore Kumar Muccherla, Jeffrey S. McNeil, Phong Sy Nguyen | 2024-11-12 |
| 12131028 | Programming selective word lines during an erase operation in a memory device | Jeffrey S. McNeil, Jonathan S. Parry, Ugo Russo, Akira Goda, Kishore Kumar Muchherla +2 more | 2024-10-29 |
| 12105961 | Copyback clear command for performing a scan and read in a memory device | Jeffrey S. McNeil, Sivagnanam Parthasarathy, Kishore Kumar Muchherla, Patrick R. Khayat, Sead Zildzic +1 more | 2024-10-01 |
| 12094547 | Continuous memory programming operations | Ali Mohammadzadeh, Walter Di Francesco, Dheeraj Srinivasan | 2024-09-17 |
| 12087372 | Partial block erase operations in memory devices | Shyam Sunder Raghunathan, Haiou Che, Walter Di Francesco | 2024-09-10 |
| 12073891 | Integrated command to calibrate read voltage level | Eric N. Lee, Jeffrey S. McNeil, James Fitzpatrick, Sivagnanam Parthasarathy, Kishore Kumar Muchherla +1 more | 2024-08-27 |
| 12067290 | On-die cross-temperature management for a memory device | Kishore Kumar Muchherla, Akira Goda, Jeffrey S. McNeil, Jung Sheng Hoei, Sivagnanam Parthasarathy +2 more | 2024-08-20 |
| 12051484 | Memory device with adjustable delay propagation of a control signal to different page buffer driver groups | Andrea D'Alessandro, Giacomo Donati, Luigi Marchese | 2024-07-30 |
| 12001336 | Hybrid parallel programming of single-level cell memory | Umberto Siciliani, Walter Di Francesco | 2024-06-04 |
| 11955204 | Apparatuses and methods for concurrently accessing different memory planes of a memory | Theodore T. Pekny, Jae-Kwan Park, Michele Incarnati, Luca De Santis | 2024-04-09 |
| 11955175 | Copy redundancy in a key-value data storage system using content addressable memory | Tyler L. Betz, Tecla Ghilardi | 2024-04-09 |
| 11953980 | Memory sub-system with dynamic calibration using component-based function(s) | Gerald L. Cadloni, Bruce A. Liikanen | 2024-04-09 |
| 11908523 | Express programming using advanced cache register release in a memory sub-system | Walter Di Francesco, Umberto Siciliani | 2024-02-20 |
| 11899966 | Implementing fault tolerant page stripes on low density memory systems | Kishore Kumar Muchherla, Mark A. Helm, Giuseppina Puzzilli, Peter Feeley, Yifen Liu +2 more | 2024-02-13 |
| 11862257 | Managing programming convergence associated with memory cells of a memory sub-system | Jun Xu, Erwin E. Yu | 2024-01-02 |