Issued Patents 2024
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12141443 | Dynamic temperature compensation in a memory component | Larry J. Koudele, Steve Kientz | 2024-11-12 |
| 12125539 | Adjustment of a starting voltage corresponding to a program operation in a memory sub-system | Michael Sheperek, Larry J. Koudele | 2024-10-22 |
| 12040026 | Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution | Larry J. Koudele, Michael Sheperek | 2024-07-16 |
| 12001286 | Memory device with dynamic processing level calibration | Larry J. Koudele | 2024-06-04 |
| 11983065 | Logic based read sample offset in a memory sub-system | Michael Sheperek | 2024-05-14 |
| 11955194 | Tracking and refreshing state metrics in memory sub-systems | Michael Sheperek, Steven Michael Kientz | 2024-04-09 |
| 11953980 | Memory sub-system with dynamic calibration using component-based function(s) | Gerald L. Cadloni, Violante Moschiano | 2024-04-09 |
| 11934666 | Memory device with dynamic program-verify voltage calibration | Larry J. Koudele | 2024-03-19 |
| 11908536 | First-pass continuous read level calibration | Michael Sheperek, Larry J. Koudele | 2024-02-20 |
| 11887676 | Adjusting program effective time using program step characteristics | — | 2024-01-30 |
| 11886726 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Peter Feeley +3 more | 2024-01-30 |
| 11862274 | Determination of state metrics of memory sub-systems following power events | Michael Sheperek, Steven Michael Kientz | 2024-01-02 |