Issued Patents 2024
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12141443 | Dynamic temperature compensation in a memory component | Bruce A. Liikanen, Steve Kientz | 2024-11-12 |
| 12125539 | Adjustment of a starting voltage corresponding to a program operation in a memory sub-system | Bruce A. Liikanen, Michael Sheperek | 2024-10-22 |
| 12061196 | Method for detection and interpretation of results indicated on a photographed diagnostic test | Alexandra Marie Koudele | 2024-08-13 |
| 12040026 | Adjustment of program verify targets corresponding to a last programming distribution and a programming distribution adjacent to an initial programming distribution | Bruce A. Liikanen, Michael Sheperek | 2024-07-16 |
| 12001286 | Memory device with dynamic processing level calibration | Bruce A. Liikanen | 2024-06-04 |
| 11941277 | Combination scan management for block families of a memory device | Shane Nowell, Michael Sheperek, Vamsi Pavan Rayaprolu | 2024-03-26 |
| 11940892 | Closing block family based on soft and hard closure criteria | Michael Sheperek, Steven S. Williams | 2024-03-26 |
| 11934666 | Memory device with dynamic program-verify voltage calibration | Bruce A. Liikanen | 2024-03-19 |
| 11923021 | Selection of read offset values in a memory sub-system based on temperature and time to program levels | Kishore Kumar Muchherla, Vamsi Pavan Rayaprolu | 2024-03-05 |
| 11915776 | Error avoidance based on voltage distribution parameters of block families | Michael Sheperek, Kishore Kumar Muchherla, Shane Nowell, Mustafa N. Kaynak | 2024-02-27 |
| 11908536 | First-pass continuous read level calibration | Michael Sheperek, Bruce A. Liikanen | 2024-02-20 |
| 11886726 | Block family-based error avoidance for memory devices | Michael Sheperek, Kishore Kumar Muchherla, Mustafa N. Kaynak, Vamsi Pavan Rayaprolu, Bruce A. Liikanen +3 more | 2024-01-30 |