Issued Patents 2024
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12182027 | Cache block budgeting techniques | David Aaron Palmer | 2024-12-31 |
| 12159059 | Command sequence to support adaptive memory systems | — | 2024-12-03 |
| 12124322 | Access operation status signaling for memory systems | Qing Liang, Jonathan S. Parry, Giuseppe Cariello | 2024-10-22 |
| 12111724 | Redundant array management techniques | Chun Sum Yeung, Jonathan S. Parry, Xiangang Luo, Reshmi Basu | 2024-10-08 |
| 12099734 | Memory block utilization in memory systems | Bo Zhou, Caixia Yang | 2024-09-24 |
| 12079481 | Memory block erase protocol | Chun Sum Yeung, Ting Luo, Guang Hu, Jonathan S. Parry | 2024-09-03 |
| 12019543 | Memory sub-system cache extension to page buffers of a memory array | Xing Wang | 2024-06-25 |
| 12002531 | Techniques for retiring blocks of a memory system | Jonathan S. Parry, Chun Sum Yeung | 2024-06-04 |
| 11983112 | Techniques for enhanced system performance after retention loss | Chun Sum Yeung, Min Rui Ma | 2024-05-14 |
| 11983423 | Host recovery for a stuck condition | Jonathan S. Parry | 2024-05-14 |
| 11977758 | Assigning blocks of memory systems | Caixia Yang | 2024-05-07 |
| 11966600 | Memory device with enhanced data reliability capabilities | David Aaron Palmer | 2024-04-23 |
| 11960398 | Enhanced data reliability in multi-level memory cells | David Aaron Palmer | 2024-04-16 |
| 11942174 | Topology-based retirement in a memory system | Chun Sum Yeung, Jonathan S. Parry | 2024-03-26 |
| 11934692 | Write booster buffer and hibernate | Luca Porzio | 2024-03-19 |
| 11934252 | Shallow hibernate power state | Nadav Grosz, Jonathan S. Parry | 2024-03-19 |
| 11899963 | Suspension during a multi-plane write procedure | Caixia Yang | 2024-02-13 |
| 11886266 | Dynamic power control | Junjun Wang, Yanming Liu, Hua Tan | 2024-01-30 |
| 11874772 | Garbage collection adapted to host write activity | Qing Liang, David Aaron Palmer | 2024-01-16 |