Issued Patents 2024
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12176348 | Self-aligned hybrid substrate stacked gate-all-around transistors | Ruqiang Bao, Dechao Guo | 2024-12-24 |
| 12148833 | Three-dimensional, monolithically stacked field effect transistors formed on the front and backside of a wafer | Sung-Dae Suk, Somnath Ghosh, Chen Zhang, Devendra K. Sadana, Dechao Guo | 2024-11-19 |
| 12142599 | Stacked transistor structure with reflection layer | Teresa J. Wu, Tenko Yamashita, Heng Wu | 2024-11-12 |
| 12142656 | Staggered stacked semiconductor devices | Albert M. Chu, Albert M. Young, Vidhi Zalani, Dechao Guo | 2024-11-12 |
| 12113013 | Dual color via patterning | Hsueh-Chung Chen, Yann Mignot, Su Chen Fan, Mary Claire Silvestre, Chi-Chun Liu | 2024-10-08 |
| 12107168 | Independent gate length tunability for stacked transistors | Ruqiang Bao, Dechao Guo | 2024-10-01 |
| 12062657 | Long channel and short channel vertical FET co-integration for vertical FET VTFET | Terence B. Hook, Baozhen Li, Kirk D. Peterson | 2024-08-13 |
| 12046673 | Vertical transistor and method of forming the vertical transistor | Fee Li Lie, Shogo Mochizuki | 2024-07-23 |
| 12009395 | Self-aligned block for vertical FETs | Ruilong Xie, Choonghyun Lee, Alexander Reznicek | 2024-06-11 |
| 12002874 | Buried power rail contact | Ruilong Xie, Brent A. Anderson, Chen Zhang, Heng Wu | 2024-06-04 |
| 12001772 | Ultra-short-height standard cell architecture | Albert M. Chu, Brent A. Anderson | 2024-06-04 |
| 11984401 | Stacked FET integration with BSPDN | Ruilong Xie, Mukta G. Farooq, Dechao Guo | 2024-05-14 |
| 11901440 | Sacrificial fin for self-aligned contact rail formation | Yann Mignot, Christopher J. Waskiewicz, Su Chen Fan, Brent A. Anderson | 2024-02-13 |
| 11895818 | Stacked FET SRAM | Ruilong Xie, Carl Radens, Ravikumar Ramachandran, Julien Frougier, Dechao Guo | 2024-02-06 |
| 11894423 | Contact resistance reduction in nanosheet device structure | Heng Wu, Dechao Guo, Ruqiang Bao, Lan Yu, Reinaldo Vega +1 more | 2024-02-06 |
| 11894361 | Co-integrated logic, electrostatic discharge, and well contact devices on a substrate | Julien Frougier, Sagarika Mukesh, Anthony I. Chou, Andrew M. Greene, Ruilong Xie +4 more | 2024-02-06 |
| 11887890 | Partial self-aligned contact for MOL | Ruilong Xie, Veeraraghavan S. Basker, Alexander Reznicek | 2024-01-30 |
| 11875987 | Contacts having a geometry to reduce resistance | Lawrence A. Clevenger, Baozhen Li, Kirk D. Peterson, Terry A. Spooner | 2024-01-16 |
| 11862710 | Vertical transistor including symmetrical source/drain extension junctions | Chun-Chen Yeh, Alexander Reznicek, Veeraraghavan S. Basker | 2024-01-02 |