Issued Patents 2022
Showing 26–50 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11450664 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Mao-Lin Huang, Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang +1 more | 2022-09-20 |
| 11450662 | Gate isolation structure | Jia-Chuan You, Chia-Hao Chang, Kuo-Cheng Chiang, Chih-Hao Wang | 2022-09-20 |
| 11444200 | Semiconductor structure with isolating feature and method for forming the same | Yu-Xuan Huang, Ching-Wei Tsai, Hou-Yu Chen | 2022-09-13 |
| 11424332 | Gap spacer for backside contact structure | Li-Zhen Yu, Lin-Yu Huang, Chih-Hao Wang | 2022-08-23 |
| 11424242 | Structure and formation method of semiconductor device with isolation structure | Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang | 2022-08-23 |
| 11417750 | Gate air spacer for fin-like field effect transistor | Chien Ning Yao, Bo-Feng Young, Sai-Hooi Yeong, Chih-Hao Wang | 2022-08-16 |
| 11417766 | Transistors having nanostructures | Cheng-Ting Chung, Ching-Wei Tsai | 2022-08-16 |
| 11410876 | Semiconductor device with air gaps and method of fabrication thereof | Chia-Hao Chang, Lin-Yu Huang, Li-Zhen Yu, Cheng-Chi Chuang, Chih-Hao Wang | 2022-08-09 |
| 11404324 | Fin isolation structures of semiconductor devices | Kuo-Cheng Chiang, Chih-Hao Wang, Yen-Ming Chen | 2022-08-02 |
| 11404417 | Low leakage device | Cheng-Ting Chung, Ching-Wei Tsai | 2022-08-02 |
| 11393830 | Semiconductor device and manufacturing method thereof | Tetsu Ohtou, Ching-Wei Tsai, Yasutoshi Okuno, Jiun-Jia Huang | 2022-07-19 |
| 11393815 | Transistors with varying width nanosheet | Yi-Hsiung Lin, Yi-Hsun Chiu, Shang-Wen Chang, Ching-Wei Tsai, Yu-Xuan Huang +1 more | 2022-07-19 |
| 11387322 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Chih-Ching Wang, Wei-Yang Lee, Ming-Chang Wen, Jo-Tzu HUNG, Wen-Hsing Hsieh | 2022-07-12 |
| 11387237 | Semiconductor component having a fin and an epitaxial contact structure over an epitaxial layer thereof | Kuo-Cheng Ching, Ching-Wei Tsai, Chih-Hao Wang | 2022-07-12 |
| 11380591 | Method for manufacturing nanostructure with various widths | Kuo-Cheng Ching, Shi Ning Ju, Chih-Hao Wang | 2022-07-05 |
| 11374093 | Semiconductor device structure and methods of forming the same | Lin-Yu Huang, Li-Zhen Yu, Cheng-Chi Chuang, Chih-Hao Wang | 2022-06-28 |
| 11374126 | FinFET structure with fin top hard mask and method of forming the same | Che-Yu Yang, Kai-Chieh Yang, Ching-Wei Tsai | 2022-06-28 |
| 11362191 | Semiconductor device and method for making the same | Chi-Yi Chuang, Ching-Wei Tsai, Chih-Hao Wang | 2022-06-14 |
| 11362213 | Method for manufacturing a FinFET device with a backside power rail and a backside self-aligned via by etching an extended source trench | Shi Ning Ju, Kuo-Cheng Chiang, Chih-Hao Wang | 2022-06-14 |
| 11362001 | Method for manufacturing nanostructures with various widths | Hsiao-Han Liu, Chih-Hao Wang, Kuo-Cheng Chiang, Shi Ning Ju | 2022-06-14 |
| 11355398 | Semiconductor device structure and methods of forming the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Shang-Wen Chang, Ching-Wei Tsai, Chih-Hao Wang | 2022-06-07 |
| 11355601 | Semiconductor devices with backside power rail and backside self-aligned via | Kuo-Cheng Chiang, Shi Ning Ju, Chih-Hao Wang, Cheng-Chi Chuang | 2022-06-07 |
| 11349008 | Negative capacitance transistor having a multilayer ferroelectric structure or a ferroelectric layer with a gradient doping profile | Chi-Hsing Hsu, Sai-Hooi Yeong, Chih-Yu Chang, Ching-Wei Tsai | 2022-05-31 |
| 11342413 | Selective liner on backside via and method thereof | Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang | 2022-05-24 |
| 11316023 | Dumbbell shaped self-aligned capping layer over source/drain contacts and method thereof | Lin-Yu Huang, Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Chih-Hao Wang | 2022-04-26 |