Issued Patents 2022
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11502168 | Tuning threshold voltage in nanosheet transitor devices | Chung-Wei Hsu, Hou-Yu Chen, Chih-Hao Wang, Ching-Wei Tsai, Kuo-Cheng Chiang +3 more | 2022-11-15 |
| 11450664 | Semiconductor device having nanosheet transistor and methods of fabrication thereof | Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Kuan-Lun Cheng +1 more | 2022-09-20 |
| 11417653 | Semiconductor structure and method for forming the same | Jia-Ni Yu, Kuo-Cheng Chiang, Lung-Kun Chu, Chung-Wei Hsu, Chih-Hao Wang | 2022-08-16 |
| 11387346 | Gate patterning process for multi-gate devices | Lung-Kun Chu, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang, Chih-Hao Wang | 2022-07-12 |
| 11380774 | Etching back and selective deposition of metal gate | Peng-Soon Lim, Cheng-Lung Hung, Weng Chang | 2022-07-05 |
| 11374105 | Nanosheet device with dipole dielectric layer and methods of forming the same | Chung-Wei Hsu, Kuo-Cheng Chiang, Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang | 2022-06-28 |
| 11264288 | Gate structure and patterning method | Lung-Kun Chu, Wei-Hao Wu, Kuo-Cheng Chiang | 2022-03-01 |
| 11257815 | Work function design to increase density of nanosheet devices | Chih-Hao Wang, Kuo-Cheng Chiang, Jia-Ni Yu, Lung-Kun Chu, Chung-Wei Hsu | 2022-02-22 |
| 11244871 | Methods of fabricating semiconductor devices for tightening spacing between nanosheets in GAA structures and structures formed thereby | Kuo-Cheng Chiang, Chung-Wei Hsu, Lung-Kun Chu, Jia-Ni Yu, Chih-Hao Wang | 2022-02-08 |
| 11245033 | Semiconductor devices with core-shell structures | Carlos H. Diaz, Chun-Hsiung Lin, Huicheng Chang, Syun-Ming Jang, Chien-Hsun Wang | 2022-02-08 |