Issued Patents 2021
Showing 1–25 of 27 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11189659 | Techniques for MRAM MTJ top electrode to via interface | Hung Cho Wang, Jiunyu Tsai, Sheng-Huang Huang | 2021-11-30 |
| 11158546 | Semiconductor arrangement and method of forming | Wei-Cheng Wu, Chin-Yi Huang, Shih-Chang Liu | 2021-10-26 |
| 11152384 | Boundary structure for embedded memory | Ming Chyi Liu, Shih-Chang Liu | 2021-10-19 |
| 11145806 | Magnetic tunnel junction with reduced damage | Carlos H. Diaz, Ru-Liang Lee | 2021-10-12 |
| 11139341 | Protection of MRAM from external magnetic field using magnetic-field-shielding structure | Kuo-An Liu, Chung-Cheng Wu, Gwan Sin Chang, Tien-Wei Chiang, Zhiqiang Wu +1 more | 2021-10-05 |
| 11121308 | Sidewall spacer structure for memory cell | Yao-Wen Chang, Chung-Chiang Min, Hung Cho Wang, Tsung-Hsueh Yang, Yuan-Tai Tseng +2 more | 2021-09-14 |
| 11101371 | Structure and method for vertical tunneling field effect transistor with leveled source and drain | Yi-Ren Chen, Chi-Wen Liu, Chao-Hsiung Wang, Ming Zhu | 2021-08-24 |
| 11094545 | Self-aligned insulated film for high-K metal gate device | Jin-Aun Ng, Bao-Ru Young, Maxi Chang, Chih-Tang Peng, Chih-Yang Yeh +8 more | 2021-08-17 |
| 11088083 | DC and AC magnetic field protection for MRAM device using magnetic-field-shielding structure | Tien-Wei Chiang, Kuo-An Liu, Chia-Hsiang Chen | 2021-08-10 |
| 11088199 | Semiconductor device | Wu-Chang Tsai, Tien-Wei Chiang | 2021-08-10 |
| 11075335 | Techniques for MRAM MTJ top electrode connection | Chen-Pin Hsu, Hung Cho Wang, Wen-Chun You, Sheng-Chang Chen, Tsun Chung Tu +2 more | 2021-07-27 |
| 11063208 | Embedded MRAM fabrication process for ion beam etching with protection by top electrode spacer | Jun Chen, Hung Cho Wang | 2021-07-13 |
| 11063058 | Memory device with metal gate | Wei-Cheng Wu, Ya-Chen Kao | 2021-07-13 |
| 11056566 | Split gate memory device and method of fabricating the same | Chang-Ming Wu, Wei-Cheng Wu, Shih-Chang Liu, Chia-Shiung Tsai | 2021-07-06 |
| 11043531 | Semiconductor structure and manufacturing method of the same | Alexander Kalnitsky, Sheng-Huang Huang, Jiunyu Tsai, Hung Cho Wang | 2021-06-22 |
| 11037982 | Semiconductor structure integrated with magnetic tunneling junction | Alexander Kalnitsky, Sheng-Haung Huang, Tien-Wei Chiang | 2021-06-15 |
| 11031543 | Via landing enhancement for memory device | Chun-Heng Liao, Chang-Jen Hsieh, Hung Cho Wang | 2021-06-08 |
| 11018241 | Polysilicon design for replacement gate technology | Kong-Beng Thei, Sheng-Chen Chung, Chiung-Han Yeh, Lee-Wee Teo, Yu-Ying Hsu +1 more | 2021-05-25 |
| 11011621 | Vertical tunneling field-effect transistor cell and fabricating the same | Cheng-Cheng Kuo, Ming Zhu | 2021-05-18 |
| 11005032 | Techniques for MRAM MTJ top electrode to metal layer interface including spacer | Hung Cho Wang, Jiunyu Tsai, Sheng-Huang Huang | 2021-05-11 |
| 10998377 | Semiconductor structure and manufacturing method of the same | Sheng-Huang Huang, Keng-Ming Kuo, Hung Cho Wang | 2021-05-04 |
| 10991758 | Semiconductor structure | Kuei-Hung Shen, Hsun-Chung Kuang, Cheng-Yuan Tsai, Ru-Liang Lee | 2021-04-27 |
| 10991408 | Magnetic random access memory structure and manufacturing method of the same | Sheng-Chang Chen | 2021-04-27 |
| 10957847 | Multilayered spacer structure for a magnetic tunneling junction and method of manufacturing | Sheng-Huang Huang, Hung Cho Wang | 2021-03-23 |
| 10957704 | High voltage CMOS with co-planar upper gate surfaces for embedded non-volatile memory | Wei-Cheng Wu, Ya-Chen Kao, Yi Hsien Lu | 2021-03-23 |