| 11188340 |
Multiple streams execution for hard-to-predict branches in a microprocessor |
Brian W. Thompto, Dung Q. Nguyen |
2021-11-30 |
$2,996,000 |
| 11157276 |
Thread-based organization of slice target register file entry in a microprocessor to permit writing scalar or vector data to portions of a single register file entry |
Steven J. Battle, Maarten J. Boersma, Niels Fricke, Dung Q. Nguyen, Brian W. Thompto |
2021-10-26 |
$2,874,000 |
| 11150907 |
Parallel slice processor having a recirculating load-store queue for fast deallocation of issue queue entries |
Salma Ayub, Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Dung Q. Nguyen +1 more |
2021-10-19 |
$2,168,000 |
| 11144323 |
Independent mapping of threads |
Sam Gat-Shang Chu, Markus Kaltenbach, Jentje Leenstra, Jose E. Moreira, Dung Q. Nguyen +1 more |
2021-10-12 |
$3,967,000 |
| 11132198 |
Instruction handling for accumulation of register results in a microprocessor |
Brian W. Thompto, Maarten J. Boersma, Andreas Wagner, Jose E. Moreira, Silvia M. Mueller +1 more |
2021-09-28 |
$6,479,000 |
| 11119772 |
Check pointing of accumulator register results in a microprocessor |
Steven J. Battle, Brian D. Barrick, Susan E. Eisen, Andreas Wagner, Dung Q. Nguyen +2 more |
2021-09-14 |
$2,674,000 |
| 11119777 |
Extended prefix including routing bit for extended instruction format |
Giles R. Frazier |
2021-09-14 |
$2,674,000 |
| 11119774 |
Slice-target register file for microprocessor |
Brian W. Thompto, Dung Q. Nguyen, Sam Gat-Shang Chu |
2021-09-14 |
$2,674,000 |
| 11106466 |
Decoupling of conditional branches |
Nicholas R. Orzol, Michael J. Genden, Dung Q. Nguyen, Eula Faye Abalos Tolentino, Brian W. Thompto |
2021-08-31 |
$6,618,000 |
| 11093282 |
Register file write using pointers |
Brian D. Barrick, Steven J. Battle, Joshua W. Bowman, Cliff Kucharski, Dung Q. Nguyen +1 more |
2021-08-17 |
$3,119,000 |
| 11093246 |
Banked slice-target register file for wide dataflow execution in a microprocessor |
Maarten J. Boersma, Niels Fricke, Michael K. Kroener, Dung Q. Nguyen, Brian W. Thompto |
2021-08-17 |
$3,119,000 |
| 11061681 |
Instruction streaming using copy select vector |
Steven J. Battle, Joshua W. Bowman, Dung Q. Nguyen, Brian W. Thompto |
2021-07-13 |
$4,436,000 |
| 10996995 |
Saving and restoring a transaction memory state |
Steven J. Battle, Dung Q. Nguyen, James Wilson Bishop, Brian W. Thompto, Susan E. Eisen |
2021-05-04 |
$7,263,000 |
| 10983800 |
Reconfigurable processor with load-store slices supporting reorder and controlling access to cache slices |
Lee Evan Eisen, Jentje Leenstra, Jose E. Moreira, Bruce Joseph Ronchetti, Brian W. Thompto +1 more |
2021-04-20 |
$5,008,000 |
| 10983797 |
Program instruction scheduling |
Christian Zoellin, Phillip G. Williams, Brian W. Thompto, Dung Q. Nguyen, Jessica Hui-Chun Tseng +3 more |
2021-04-20 |
$5,008,000 |
| 10949205 |
Implementation of execution compression of instructions in slice target register file mapper |
Joshua W. Bowman, Dung Q. Nguyen, Brian W. Thompto, Maureen A. Delaney, Cliff Kucharski +1 more |
2021-03-16 |
$6,230,000 |
| 10929144 |
Speculatively releasing store data before store instruction completion in a processor |
Kenneth L. Ward, Dung Q. Nguyen, Bryan Lloyd |
2021-02-23 |
$3,028,000 |
| 10901743 |
Speculative execution of both paths of a weakly predicted branch instruction |
Kenneth L. Ward, Dung Q. Nguyen, Susan E. Eisen |
2021-01-26 |
$1,788,000 |
| 10884742 |
Handling unaligned load operations in a multi-slice computer processor |
Sundeep Chadha, Robert A. Cordes, David A. Hrusecky, Jentje Leenstra, Dung Q. Nguyen +2 more |
2021-01-05 |
$2,293,000 |