Issued Patents 2021
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11182167 | Method to determine the oldest instruction in an instruction queue of a processor with multiple instruction threads | Arni Ingimundarson, Maarten J. Boersma | 2021-11-23 |
| 11163571 | Fusion to enhance early address generation of load instructions in a microprocessor | Brian D. Barrick, Sundeep Chadha, Sheldon B. Levenstein, Phillip G. Williams, Dung Q. Nguyen +2 more | 2021-11-02 |
| 11157276 | Thread-based organization of slice target register file entry in a microprocessor to permit writing scalar or vector data to portions of a single register file entry | Steven J. Battle, Maarten J. Boersma, Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2021-10-26 |
| 11093246 | Banked slice-target register file for wide dataflow execution in a microprocessor | Maarten J. Boersma, Michael K. Kroener, Hung Q. Le, Dung Q. Nguyen, Brian W. Thompto | 2021-08-17 |
| 10996953 | Low latency execution of floating-point record form instructions | Brian J. D. Barrick, Maarten J. Boersma, Michael J. Genden | 2021-05-04 |