Issued Patents 2020
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10790393 | Utilizing multilayer gate spacer to reduce erosion of semiconductor Fin during spacer patterning | Andrew M. Greene, Hong He, Sivananda K. Kanakasabapathy, Gauri Karve, Eric R. Miller | 2020-09-29 |
| 10756203 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Kangguo Cheng, Nicolas Loubet | 2020-08-25 |
| 10741675 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Kangguo Cheng, Nicolas Loubet | 2020-08-11 |
| 10699965 | Removal of epitaxy defects in transistors | Andrew M. Greene, Ruilong Xie, Christopher M. Prindle | 2020-06-30 |
| 10636694 | Dielectric isolation in gate-all-around devices | Robin Hsin Kuo Chao, Kangguo Cheng, Nicolas Loubet, Ruilong Xie | 2020-04-28 |
| 10553705 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Kangguo Cheng, Nicolas Loubet | 2020-02-04 |
| 10546945 | Sub-thermal switching slope vertical field effect transistor with dual-gate feedback loop mechanism | Julien Frougier, Ruilong Xie, Steven R. Bentley, Kangguo Cheng, Nicolas Loubet | 2020-01-28 |