Issued Patents 2020
Showing 26–32 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10566443 | Nanosheet transitor with optimized junction and cladding defectivity control | Kangguo Cheng, Nicolas Loubet, Ruilong Xie, Tenko Yamashita | 2020-02-18 |
| 10566438 | Nanosheet transistor with dual inner airgap spacers | Ruilong Xie, Kangguo Cheng, Tenko Yamashita | 2020-02-18 |
| 10546856 | CMOS structure having low resistance contacts and fabrication method | Qing Liu, Xiuyu Cai, Ruilong Xie | 2020-01-28 |
| 10546942 | Nanosheet transistor with optimized junction and cladding defectivity control | Kangguo Cheng, Nicolas Loubet, Ruilong Xie, Tenko Yamashita | 2020-01-28 |
| 10546776 | Dual silicide liner flow for enabling low contact resistance | Praneet Adusumilli, Veeraraghavan S. Basker, Zuoguang Liu, Tenko Yamashita | 2020-01-28 |
| 10535773 | FinFET with sigma recessed source/drain and un-doped buffer layer epitaxy for uniform junction formation | Dechao Guo, Hemanth Jagannathan, Shogo Mochizuki, Gen Tsutsui | 2020-01-14 |
| 10529858 | FinFET with merge-free fins | Hong He, Chiahsun Tseng, Junli Wang, Yunpeng Yin | 2020-01-07 |