Issued Patents 2019
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10485111 | Via and skip via structures | Shao Beng Law, Nicholas V. LiCausi, Errol Todd Ryan, James Jay McMahon, Ryan Smith | 2019-11-19 |
| RE47630 | Semiconductor device having a self-forming barrier layer at via bottom | Larry Zhao, Ming He, Sean Xuan Lin | 2019-10-01 |
| 10366919 | Fully aligned via in ground rule region | Nicholas V. LiCausi | 2019-07-30 |
| 10283372 | Interconnects formed by a metal replacement process | Sean Xuan Lin, Mark V. Raymond, Errol Todd Ryan, Nicholas V. LiCausi | 2019-05-07 |
| 10283608 | Low resistance contacts to source or drain region of transistor | Frank W. Mont, Mark V. Raymond, Chengyu Niu | 2019-05-07 |
| 10276689 | Method of forming a vertical field effect transistor (VFET) and a VFET structure | Yi Qi, Jianwei Peng, Hsien-Ching Lo, Ruilong Xie, Hui Zang | 2019-04-30 |
| 10262892 | Skip via structures | Frank W. Mont, Errol Todd Ryan | 2019-04-16 |
| 10236256 | Pre-spacer self-aligned cut formation | Shao Beng Law | 2019-03-19 |
| 10211147 | Metal-insulator-metal capacitors with dielectric inner spacers | Chanro Park, Lei Sun, Yi Qi, Roderick A. Augur | 2019-02-19 |
| 10199261 | Via and skip via structures | James Jay McMahon, Ryan Smith, Nicholas V. LiCausi, Errol Todd Ryan, Shao Beng Law | 2019-02-05 |
| 10199271 | Self-aligned metal wire on contact structure and method for forming same | Ruilong Xie, Guillaume Bouche, Laertis Economikos, Lei Sun, Guoxiang Ning | 2019-02-05 |
| 10199264 | Self aligned interconnect structures | Roderick A. Augur, Hoon Kim | 2019-02-05 |