Issued Patents 2018
Showing 1–17 of 17 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10084050 | Semiconductor device with low-K gate cap and self-aligned contact | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2018-09-25 |
| 10074569 | Minimize middle-of-line contact line shorts | Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2018-09-11 |
| 10043904 | Method and structure of improving contact resistance for passive and long channel devices | Injo Ok, Soon-Cheon Seo, Balasubramanian Pranatharthiharan | 2018-08-07 |
| 10020306 | Spacer for trench epitaxial structures | Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2018-07-10 |
| 10014220 | Self heating reduction for analog radio frequency (RF) device | Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Tenko Yamashita | 2018-07-03 |
| 10014295 | Self heating reduction for analog radio frequency (RF) device | Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo, Tenko Yamashita | 2018-07-03 |
| 9985024 | Minimizing shorting between FinFET epitaxial regions | Kangguo Cheng, Balasubramanian Pranatharthiharan, Alexander Reznicek | 2018-05-29 |
| 9972620 | Preventing shorting between source and/or drain contacts and gate | Dominic J. Schepis, Kangguo Cheng, Alexander Reznicek | 2018-05-15 |
| 9966374 | Semiconductor device with gate structures having low-K spacers on sidewalls and electrical contacts therebetween | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2018-05-08 |
| 9953976 | Effective device formation for advanced technology nodes with aggressive fin-pitch scaling | Injo Ok, Sanjay C. Mehta, Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2018-04-24 |
| 9917089 | III-V semiconductor CMOS FinFET device | Hemanth Jagannathan, Alexander Reznicek, Devendra K. Sadana | 2018-03-13 |
| 9905463 | Self-aligned low dielectric constant gate cap and a method of forming the same | Balasubramanian Pranatharthiharan, Injo Ok | 2018-02-27 |
| 9905421 | Improving channel strain and controlling lateral epitaxial growth of the source and drain in FinFET devices | Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2018-02-27 |
| 9899378 | Simultaneously fabricating a high voltage transistor and a finFET | Kangguo Cheng, Ali Khakifirooz, Alexander Reznicek | 2018-02-20 |
| 9893085 | Integrated circuit (IC) with offset gate sidewall contacts and method of manufacture | Injo Ok, Balasubramanian Pranatharthiharan, Soon-Cheon Seo | 2018-02-13 |
| 9887289 | Method and structure of improving contact resistance for passive and long channel devices | Injo Ok, Soon-Cheon Seo, Balasubramanian Pranatharthiharan | 2018-02-06 |
| 9871099 | Nanosheet isolation for bulk CMOS non-planar devices | Balasubramanian Pranatharthiharan, Injo Ok, Soon-Cheon Seo | 2018-01-16 |