Issued Patents 2017
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9831090 | Method and structure for semiconductor device having gate spacer protection layer | Chung-Ju Lee, Hai-Ching Chen, Chien-Hua Huang, Tien-I Bao | 2017-11-28 |
| 9741567 | Method of forming multiple patterning spacer structures | Chung-Ju Lee, Shau-Lin Shue | 2017-08-22 |
| 9721887 | Method of forming metal interconnection | Chao-Hsien Peng, Ming-Han Lee, Shau-Lin Shue | 2017-08-01 |
| 9698100 | Structure and method for interconnection | Chung-Ju Lee, Tien-I Bao | 2017-07-04 |
| 9633949 | Copper etching integration scheme | Chung-Ju Lee, Hsiang-Huan Lee, Tien-I Bao | 2017-04-25 |
| 9633999 | Method and structure for semiconductor mid-end-of-line (MEOL) process | Chung-Ju Lee, Chien-Hua Huang, Hsiang-Ku Shen, Zhao-Cheng Chen | 2017-04-25 |
| 9633958 | Bonding pad surface damage reduction in a formation of digital pattern generator | Tsung-Chih Chien, Hui-Min Huang, Tien-I Bao | 2017-04-25 |