Issued Patents 2016
Showing 1–25 of 36 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9524943 | Compact semiconductor package and related methods | — | 2016-12-20 |
| 9502390 | BVA interposer | Terrence Caskey, Ilyas Mohammed, Charles G. Woychik, Michael Newman, Pezhman Monadgemi +3 more | 2016-11-22 |
| 9496154 | Use of underfill tape in microelectronic components, and microelectronic components with cavities coupled to through-substrate vias | Eric Tosaya, Rajesh Katkar, Liang Wang | 2016-11-15 |
| 9484325 | Interconnections for a substrate associated with a backside reveal | — | 2016-11-01 |
| 9455162 | Low cost interposer and method of fabrication | — | 2016-09-27 |
| 9455237 | Bowl-shaped solder structure | Rajesh Katkar | 2016-09-27 |
| 9455181 | Vias in porous substrates | Ilyas Mohammed, Belgacem Haba, Piyush Savalia | 2016-09-27 |
| 9443837 | Z-connection for a microelectronic package using electroless plating | Belgacem Haba | 2016-09-13 |
| 9437557 | High density three-dimensional integrated capacitors | Ilyas Mohammed, Belgacem Haba, Piyush Savalia, Vage Oganesian | 2016-09-06 |
| 9437566 | Conductive connections, structures with such connections, and methods of manufacture | Rajesh Katkar | 2016-09-06 |
| 9437536 | Reversed build-up substrate for 2.5D | Liang Wang, Rajesh Katkar, Hong Shen, Belgacem Haba | 2016-09-06 |
| 9433093 | High strength through-substrate vias | — | 2016-08-30 |
| 9418924 | Stacked die integrated circuit | Charles G. Woychik, Ron Zhang, Daniel Buckminster, Guilian Gao | 2016-08-16 |
| 9412806 | Making multilayer 3D capacitors using arrays of upstanding rods or ridges | Liang Wang, Rajesh Katkar, Hong Shen | 2016-08-09 |
| 9412646 | Via in substrate with deposited layer | — | 2016-08-09 |
| 9397038 | Microelectronic components with features wrapping around protrusions of conductive vias protruding from through-holes passing through substrates | Charles G. Woychik, Arkalgud R. Sitaram, Hong Shen, Zhuowen Sun, Liang Wang +1 more | 2016-07-19 |
| 9397051 | Warpage reduction in structures with electrical circuitry | — | 2016-07-19 |
| 9398700 | Method of forming a reliable microelectronic assembly | Belgacem Haba, Charles G. Woychik, Michael Newman, Terrence Caskey | 2016-07-19 |
| 9385036 | Reliable packaging and interconnect structures | Belgacem Haba, Craig Mitchell | 2016-07-05 |
| 9379074 | Die stacks with one or more bond via arrays of wire bond wires and with one or more arrays of bump interconnects | Rajesh Katkar | 2016-06-28 |
| 9379008 | Metal PVD-free conducting structures | Charles G. Woychik, Michael Newman, Pezhman Monadgemi, Terrence Caskey | 2016-06-28 |
| 9373585 | Polymer member based interconnect | Rajesh Katkar, Charles G. Woychik, Guilian Gao, Arkalgud R. Sitaram | 2016-06-21 |
| 9365947 | Method for preparing low cost substrates | Sitaram Arkalgud | 2016-06-14 |
| 9368479 | Thermal vias disposed in a substrate proximate to a well thereof | Rajesh Katkar, Arkalgud R. Sitaram | 2016-06-14 |
| 9362204 | Tunable composite interposer | Charles G. Woychik, Hiroaki Sato | 2016-06-07 |