Issued Patents 2011
Showing 26–39 of 39 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7960841 | Through-hole via on saw streets | Heap Hoe Kuan | 2011-06-14 |
| 7952176 | Integrated circuit packaging system and method of manufacture thereof | Reza A. Pagaila, Linda Pei Ee Chua | 2011-05-31 |
| 7948066 | Integrated circuit package system with lead locking structure | Heap Hoe Kuan, Linda Pei Ee Chua | 2011-05-24 |
| 7939368 | Wafer level chip scale package system with a thermal dissipation structure | Seng Guan Chow, Heap Hoe Kuan | 2011-05-10 |
| 7927917 | Integrated circuit packaging system with inward and outward interconnects and method of manufacture thereof | Reza A. Pagaila, Jong-Woo Ha | 2011-04-19 |
| 7923846 | Integrated circuit package-in-package system with wire-in-film encapsulant | Seng Guan Chow, Heap Hoe Kuan, Linda Pei Ee Chua, Rui Huang | 2011-04-12 |
| 7919838 | Integrated circuit package system with encapsulation lock and method of manufacture thereof | Sung Uk Yang | 2011-04-05 |
| 7911070 | Integrated circuit packaging system having planar interconnect | Reza A. Pagaila, Heap Hoe Kuan | 2011-03-22 |
| 7901956 | Structure for bumped wafer test | Francis Heap Hoe Kuan, Lee Huang Chew | 2011-03-08 |
| 7902644 | Integrated circuit package system for electromagnetic isolation | Rui Huang, Seng Guan Chow, Heap Hoe Kuan | 2011-03-08 |
| 7902638 | Semiconductor die with through-hole via on saw streets and through-hole via in active area of die | Heap Hoe Kuan, Linda Pei Ee Chua | 2011-03-08 |
| 7892894 | Method of manufacturing integrated circuit package system with warp-free chip | Il Kwon Shim, Antonio B. Dimaano, Jr., Heap Hoe Kuan | 2011-02-22 |
| 7880275 | Semiconductor device and method of forming shielding along a profile disposed in peripheral region around the device | Reza A. Pagaila, Rui Huang | 2011-02-01 |
| 7863099 | Integrated circuit package system with overhanging connection stack | Seng Guan Chow | 2011-01-04 |