Issued Patents 2005
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6979635 | Method of forming miniaturized polycrystalline silicon gate electrodes using selective oxidation | Akif Sultan, Qi Xiang | 2005-12-27 |
| 6974983 | Isolated FinFET P-channel/N-channel transistor pair | Wiley Eugene Hill, Shibly S. Ahmed, Haihong Wang | 2005-12-13 |
| 6967175 | Damascene gate semiconductor processing with local thinning of channel region | Shibly S. Ahmed, Haihong Wang | 2005-11-22 |
| 6963104 | Non-volatile memory device | Yider Wu | 2005-11-08 |
| 6960804 | Semiconductor device having a gate structure surrounding a fin | Chih-Yuh Yang, Shibly S. Ahmed, Judy Xilin An, Srikanteswara Dakshina-Murthy | 2005-11-01 |
| 6958512 | Non-volatile memory device | Yider Wu, Shibly S. Ahmed, Haihong Wang | 2005-10-25 |
| 6936882 | Selective silicidation of gates in semiconductor devices to achieve multiple threshold voltages | Shibly S. Ahmed, Haihong Wang | 2005-08-30 |
| 6936506 | Strained-silicon devices with different silicon thicknesses | James F. Buller, Derick J. Wristers, Qi Xiang | 2005-08-30 |
| 6933558 | Flash memory device | Wiley Eugene Hill, Haihong Wang, Yider Wu | 2005-08-23 |
| 6924561 | SRAM formation using shadow implantation | Wiley Eugene Hill | 2005-08-02 |
| 6921704 | Method for improving MOS mobility | David Wu, Akif Sultan | 2005-07-26 |
| 6921963 | Narrow fin FinFET | Zoran Krivokapic, Judy Xilin An, Srikanteswara Dakshina-Murthy, Haihong Wang | 2005-07-26 |
| 6914277 | Merged FinFET P-channel/N-channel pair | Wiley Eugene Hill, Shibly S. Ahmed, Haihong Wang | 2005-07-05 |
| 6911697 | Semiconductor device having a thin fin and raised source/drain areas | Haihong Wang, Judy Xilin An | 2005-06-28 |
| 6902966 | Low-temperature post-dopant activation process | Robert B. Ogle, Eric N. Paton, Cyrus E. Tabery, Qi Xiang | 2005-06-07 |
| 6897527 | Strained channel FinFET | Srikanteswara Dakshina-Murthy, Judy Xilin An, Zoran Krivokapic, Haihong Wang | 2005-05-24 |
| 6894355 | Semiconductor device with silicide source/drain and high-K dielectric | Olov Karlsson | 2005-05-17 |
| 6894337 | System and method for forming stacked fin structure using metal-induced-crystallization | Haihong Wang, Shibly S. Ahmed | 2005-05-17 |
| 6893930 | Fabrication of field effect transistor with shallow junctions using low temperature activation of antimony | Haihong Wang | 2005-05-17 |
| 6876042 | Additional gate control for a double-gate MOSFET | Shibly S. Ahmed, Haihong Wang | 2005-04-05 |
| 6872647 | Method for forming multiple fins in a semiconductor device | Judy Xilin An, Cyrus E. Tabery | 2005-03-29 |
| 6867101 | Method of fabricating a semiconductor device having a nitride/high-k/nitride gate dielectric stack by atomic layer deposition (ALD) and a device thereby formed | — | 2005-03-15 |
| 6867080 | Polysilicon tilting to prevent geometry effects during laser thermal annealing | Eric N. Paton, Robert B. Ogle, Cyrus E. Tabery, Qi Xiang | 2005-03-15 |
| 6855607 | Multi-step chemical mechanical polishing of a gate area in a FinFET | Krishnashree Achuthan, Shibly S. Ahmed, Haihong Wang | 2005-02-15 |
| 6855989 | Damascene finfet gate with selective metal interdiffusion | Haihong Wang, Shibly S. Ahmed, Ming-Ren Lin | 2005-02-15 |