Issued Patents 2003
Showing 26–50 of 55 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6574127 | System and method for reducing noise of congested datalines in an eDRAM | Rajiv V. Joshi, David R. Hanson | 2003-06-03 |
| 6573585 | Electrically blowable fuse with reduced cross-sectional area | Kenneth C. Arndt, Dureseti Chidambarrao, Jack A. Mandelman, Carl Radens | 2003-06-03 |
| 6570434 | Method to improve charge pump reliability, efficiency and size | Russell J. Houghton, Oliver Weinfurtner | 2003-05-27 |
| 6570207 | Structure and method for creating vertical capacitor and anti-fuse in DRAM process employing vertical array device cell complex | Jack A. Mandelman, Carl Radens, William R. Tonti | 2003-05-27 |
| 6566191 | Forming electronic structures having dual dielectric thicknesses and the structure so formed | Jack A. Mandelman, Carl Radens, Richard Strub, William R. Tonti | 2003-05-20 |
| 6563736 | Flash memory structure having double celled elements and method for fabricating the same | Rajiv V. Joshi, Carl Radens, Jack A. Mandelman, William R. Tonti | 2003-05-13 |
| 6563160 | High dielectric constant materials forming components of DRAM such as deep-trench capacitors and gate dielectric (insulators) for support circuits | Lawrence A. Clevenger, Carl Radens, Joseph F. Shepard, Jr. | 2003-05-13 |
| 6556477 | Integrated chip having SRAM, DRAM and flash memory and method for fabricating the same | Carl Radens, Li-Kong Wang | 2003-04-29 |
| 6551895 | Metal oxide semiconductor capacitor utilizing dummy lithographic patterns | Dmitry Netis | 2003-04-22 |
| 6552398 | T-Ram array having a planar cell structure and method for fabricating the same | Rajiv V. Joshi, Fariborz Assaderaghi | 2003-04-22 |
| 6552378 | Ultra compact DRAM cell and method of making | Heinz Hoenigschmid, Jack A. Mandelman | 2003-04-22 |
| 6549450 | Method and system for improving the performance on SOI memory arrays in an SRAM architecture system | Rajiv V. Joshi, Fariborz Assaderaghi, Mary J. Saccamango | 2003-04-15 |
| 6548358 | Electrically blowable fuse with reduced cross-sectional area | Kenneth C. Arndt, Dureseti Chidambarrao, Jack A. Mandelman, Carl Radens | 2003-04-15 |
| 6545935 | Dual-port DRAM architecture system | Rajiv V. Joshi, Radens Carl | 2003-04-08 |
| 6545339 | Semiconductor device incorporating elements formed of refractory metal-silicon-nitrogen and method for fabrication | Cyril Cabral, Jr., Lawrence A. Clevenger, Keith Kwong Hon Wong | 2003-04-08 |
| 6541331 | Method of manufacturing high dielectric constant material | Michael P. Chudzik, Lawrence A. Clevenger, Deborah A. Neumayer, Joseph F. Shepard, Jr. | 2003-04-01 |
| 6542973 | Integrated redundancy architecture system for an embedded DRAM | Li-Kong Wang, Toshiaki Kirihata, Gregory J. Fredeman | 2003-04-01 |
| 6541815 | High-density dual-cell flash memory structure | Jack A. Mandelman, Chung H. Lam, Carl Radens | 2003-04-01 |
| 6538295 | Salicide device with borderless contact | Gary B. Bronner, Jeffrey P. Gambino, Jack A. Mandelman, Carl Radens, William R. Tonti | 2003-03-25 |
| 6531911 | Low-power band-gap reference and temperature sensor circuit | Rajiv V. Joshi, Russell J. Houghton | 2003-03-11 |
| 6529402 | Low power static memory | John E. Andersen, Li-Kong Wang | 2003-03-04 |
| 6524941 | Sub-minimum wiring structure | Jack A. Mandelman | 2003-02-25 |
| 6524908 | Method for forming refractory metal-silicon-nitrogen capacitors and structures formed | Cyril Cabral, Jr., Lawrence A. Clevenger, Keith Kwong Hon Wong | 2003-02-25 |
| 6512683 | System and method for increasing the speed of memories | Li-Kong Wang, Toshiaki Kirihata | 2003-01-28 |
| 6512275 | Semiconductor integrated circuits | Jack A. Mandelman | 2003-01-28 |