Issued Patents 2003
Showing 1–22 of 22 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6670234 | Method of integrating volatile and non-volatile memory cells on the same substrate and a semiconductor memory device thereof | Louis L. Hsu, Carl Radens | 2003-12-30 |
| 6664576 | Polymer thin-film transistor with contact etch stops | Tricia Breen, Lawrence A. Clevenger, Louis L. Hsu, Kwong Hon Wong | 2003-12-16 |
| 6649959 | Method for increasing a very-large-scale-integrated (VLSI) capacitor size on bulk silicon and silicon-on-insulator (SOI) wafers and structure formed thereby | Louis L. Hsu | 2003-11-18 |
| 6649935 | Self-aligned, planarized thin-film transistors, devices employing the same | Louis L. Hsu, Jack A. Mandelman, William R. Tonti | 2003-11-18 |
| 6627924 | Memory system capable of operating at high temperatures and method for fabricating the same | Louis L. Hsu | 2003-09-30 |
| 6629291 | Integrated power solution for system on chip applications | Russell J. Houghton, Joni C. Hsu, Louis L. Hsu | 2003-09-30 |
| 6624526 | Compact SRAM cell incorporating refractory metal-silicon-nitrogen resistive elements and method for fabricating | Lawrence A. Clevenger, Louis L. Hsu | 2003-09-23 |
| 6620657 | Method of forming a planar polymer transistor using substrate bonding techniques | Tricia Breen, Lawrence A. Clevenger, Louis L. Hsu, Kwong Hon Wong | 2003-09-16 |
| 6621294 | Pad system for an integrated circuit or device | Louis L. Hsu, Chorng-Lii Hwang | 2003-09-16 |
| 6614714 | Semiconductor memory system having a data clock system for reliable high-speed data transfers | Louis L. Hsu, Jeremy K. Stephens, Daniel W. Storaska | 2003-09-02 |
| 6611033 | Micromachined electromechanical (MEM) random access memory array and method of making same | Louis L. Hsu | 2003-08-26 |
| 6603683 | Decoding scheme for a stacked bank architecture | Louis L. Hsu | 2003-08-05 |
| 6603690 | Low-power static column redundancy scheme for semiconductor memories | Howard H. Chen, Louis L. Hsu | 2003-08-05 |
| 6594196 | Multi-port memory device and system for addressing the multi-port memory device | Louis L. Hsu, Tin-Chee Lo | 2003-07-15 |
| 6579743 | Chip packaging system and method using deposited diamond film | Lawrence A. Clevenger, Louis L. Hsu, Tsorng-Dih Yuan | 2003-06-17 |
| 6573565 | Method and structure for providing improved thermal conduction for silicon semiconductor devices | Lawrence A. Clevenger, Louis L. Hsu, Tsomg-Dih Yuan | 2003-06-03 |
| 6556477 | Integrated chip having SRAM, DRAM and flash memory and method for fabricating the same | Louis L. Hsu, Carl Radens | 2003-04-29 |
| 6542973 | Integrated redundancy architecture system for an embedded DRAM | Louis L. Hsu, Toshiaki Kirihata, Gregory J. Fredeman | 2003-04-01 |
| 6529402 | Low power static memory | John E. Andersen, Louis L. Hsu | 2003-03-04 |
| 6512683 | System and method for increasing the speed of memories | Louis L. Hsu, Toshiaki Kirihata | 2003-01-28 |
| 6504777 | Enhanced bitline equalization for hierarchical bitline architecture | Louis L. Hsu | 2003-01-07 |
| 6504173 | Dual gate FET and process | Louis L. Hsu | 2003-01-07 |