Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6654283 | Flash memory array architecture and method of programming, erasing and reading thereof | — | 2003-11-25 |
| 6653189 | Source side boron implant and drain side MDD implant for deep sub 0.18 micron flash memory | Yue-Song He, Timothy Thurgate, Chi Chang, Mark Randolph, Ngaching Wong | 2003-11-25 |
| 6646914 | Flash memory array architecture having staggered metal lines | Richard Fastow | 2003-11-11 |
| 6589841 | Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate | Tuan Pham, Mark T. Ramsbey, Angela T. Hui | 2003-07-08 |
| 6583009 | Innovative narrow gate formation for floating gate flash technology | Angela T. Hui, Kelwin Ko, Hiroyuki Kinoshita, Yu Sun | 2003-06-24 |
| 6548334 | Capping layer | Tuan Pham, Mark T. Ramsbey, Angela T. Hui | 2003-04-15 |
| 6524914 | Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory | Yue-Song He, Timothy Thurgate, Chi Chang | 2003-02-25 |
| 6518072 | Deposited screen oxide for reducing gate edge lifting | Carl Robert Huster, Daniel Sobek, Timothy Thurgate | 2003-02-11 |
| 6510085 | Method of channel hot electron programming for short channel NOR flash arrays | Richard Fastow, Sheunghee Park, Zhigang Wang, Chi Chang | 2003-01-21 |