Issued Patents 2003
Showing 1–3 of 3 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6549466 | Using a negative gate erase voltage applied in steps of decreasing amounts to reduce erase time for a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure | Narbeh Derhacobian, Michael A. Van Buskirk, Chi Chang | 2003-04-15 |
| 6518072 | Deposited screen oxide for reducing gate edge lifting | Carl Robert Huster, Timothy Thurgate, Sameer Haddad | 2003-02-11 |
| 6519182 | Using hot carrier injection to control over-programming in a non-volatile memory cell having an oxide-nitride-oxide (ONO) structure | Narbeh Derhacobian | 2003-02-11 |