Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6618290 | Method of programming a non-volatile memory cell using a baking process | Janet Wang | 2003-09-09 |
| 6590811 | Higher program VT and faster programming rates based on improved erase methods | Darlene Hamilton, Janet Wang, Kulachet Tanpairoj | 2003-07-08 |
| 6567303 | Charge injection | Darlene Hamilton, Janet Wang, Tim Thurgate, Michael Han | 2003-05-20 |
| 6555436 | Simultaneous formation of charge storage and bitline to wordline isolation | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +3 more | 2003-04-29 |
| 6549466 | Using a negative gate erase voltage applied in steps of decreasing amounts to reduce erase time for a non-volatile memory cell with an oxide-nitride-oxide (ONO) structure | Michael A. Van Buskirk, Chi Chang, Daniel Sobek | 2003-04-15 |
| 6541816 | Planar structure for non-volatile memory devices | Mark T. Ramsbey, Jean Y. Yang, Hidehiko Shiraiwa, Michael A. Van Buskirk, David Michael Rogers +2 more | 2003-04-01 |
| 6529410 | NAND array structure and method with buried layer | Michael Han | 2003-03-04 |
| 6519182 | Using hot carrier injection to control over-programming in a non-volatile memory cell having an oxide-nitride-oxide (ONO) structure | Daniel Sobek | 2003-02-11 |
| 6514830 | Method of manufacturing high voltage transistor with modified field implant mask | Hao Fang | 2003-02-04 |