Issued Patents 2003
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6653189 | Source side boron implant and drain side MDD implant for deep sub 0.18 micron flash memory | Sameer Haddad, Timothy Thurgate, Chi Chang, Mark Randolph, Ngaching Wong | 2003-11-25 |
| 6647995 | Method and system for eliminating post etch residues | Jiahua Huang, Frank Mak | 2003-11-18 |
| 6617639 | Use of high-K dielectric material for ONO and tunnel oxide to improve floating gate flash memory coupling | Zhigang Wang, Xin Guo | 2003-09-09 |
| 6580639 | Method of reducing program disturbs in NAND type flash memory devices | Kent Kuohua Chang, Allen Huang | 2003-06-17 |
| 6570211 | 2Bit/cell architecture for floating gate flash memory product and associated method | Richard Fastow, Zheng Wei | 2003-05-27 |
| 6541338 | Low defect density process for deep sub-0.18 &mgr;m flash memory technologies | Zhigang Wang, Richard Fastow | 2003-04-01 |
| 6524914 | Source side boron implanting and diffusing device architecture for deep sub 0.18 micron flash memory | Sameer Haddad, Timothy Thurgate, Chi Chang | 2003-02-25 |