Issued Patents 2002
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6495469 | High selectivity, low etch depth micro-loading process for non stop layer damascene etch | Jiing-Feng Yang, Li-Te Lin | 2002-12-17 |
| 6457477 | Method of cleaning a copper/porous low-k dual damascene etch | Bao-Ru Young, Shwangming Jeng, Chi-Shiung Tsai | 2002-10-01 |
| 6458650 | CU second electrode process with in situ ashing and oxidation process | Yi-Chen Huang, Chao-Chen Chen | 2002-10-01 |
| 6429119 | Dual damascene process to reduce etch barrier thickness | Chia-Shiung Tsai, Ming-Huei Lui, Jen-Cheng Liu, Chao-Cheng Chen | 2002-08-06 |
| 6376366 | Partial hard mask open process for hard mask dual damascene etch | Li-Te Lin | 2002-04-23 |