Issued Patents 2002
Showing 1–25 of 90 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6500501 | Chemical vapor deposition process for depositing titanium silicide films from an organometallic compound | — | 2002-12-31 |
| 6498503 | Semiconductor test interconnect with variable flexure contacts | Alan G. Wood | 2002-12-24 |
| 6493934 | Method for sawing wafers employing multiple indexing techniques for multiple die dimensions | Derek Gochnour, Michael E. Hess, David R. Hembree | 2002-12-17 |
| 6495400 | Method of forming low profile semiconductor package | Larry D. Kinsman | 2002-12-17 |
| 6492738 | Apparatus and methods of testing and assembling bumped devices using an anisotropically conductive layer | Alan G. Wood, Warren M. Farnworth | 2002-12-10 |
| 6493229 | Heat sink chip package | Larry D. Kinsman | 2002-12-10 |
| 6484279 | Testing system for evaluating integrated circuits, a testing system, and a method for testing an integrated circuit | — | 2002-11-19 |
| 6480015 | Circuit probing methods | — | 2002-11-12 |
| 6478627 | Method and apparatus for forming modular sockets using flexible interconnects and resulting structures | Warren M. Farnworth, David J. Corisis | 2002-11-12 |
| 6472240 | Methods of semiconductor processing | David R. Hembree | 2002-10-29 |
| 6469532 | Apparatus for forming coaxial silicon interconnects | David R. Hembree, Alan G. Wood | 2002-10-22 |
| 6469537 | System for testing semiconductor wafers having interconnect with pressure sensing mechanism | Warren M. Farnworth | 2002-10-22 |
| 6466047 | System for testing bumped semiconductor components with on-board multiplex circuit for expanding tester resources | C. Patrick Doherty, Jorge L. deVarona | 2002-10-15 |
| 6462399 | Multi-chip module employing a carrier substrate with micromachined alignment structures and method of forming | — | 2002-10-08 |
| 6462423 | Flip-chip with matched lines and ground plane | John O. Jacobson | 2002-10-08 |
| 6461930 | Capacitor and method for forming the same | — | 2002-10-08 |
| 6458625 | Multi chip semiconductor package and method of construction | — | 2002-10-01 |
| 6459105 | Apparatus for sawing wafers employing multiple indexing techniques for multiple die dimensions | Derek Gochnour, Michael E. Hess, David R. Hembree | 2002-10-01 |
| 6456100 | Apparatus for attaching to a semiconductor | David R. Hembree, Derek Gochnour | 2002-09-24 |
| 6453550 | Method for forming modular sockets using flexible interconnects and resulting structures | Warren M. Farnworth, David J. Corisis | 2002-09-24 |
| 6455933 | Underfill of a bumped or raised die utilizing a barrier adjacent to the side wall of flip chip | James M. Wark | 2002-09-24 |
| 6451658 | Graded layer for use in semiconductor circuits and method for making same | Scott Meikle | 2002-09-17 |
| 6448143 | Method for using thin spacers and oxidation in gate oxides | Mohamed A. Ditali | 2002-09-10 |
| 6441320 | Electrically conductive projections having conductive coverings | — | 2002-08-27 |
| 6441483 | Die stacking scheme | — | 2002-08-27 |