Issued Patents 2002
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6498385 | Post-fuse blow corrosion prevention structure for copper fuses | Timothy H. Daubenspeck, Daniel C. Edelstein, Robert M. Geffken, William T. Motsiff, Anthony K. Stamper | 2002-12-24 |
| 6476445 | Method and structures for dual depth oxygen layers in silicon-on-insulator processes | Jeffrey S. Brown, Andres Bryant, Robert J. Gauthier, Jr., Randy W. Mann | 2002-11-05 |
| 6465870 | ESD robust silicon germanium transistor with emitter NP-block mask extrinsic base ballasting resistor with doped facet region | — | 2002-10-15 |
| 6455919 | Internally ballasted silicon germanium transistor | Ciaran J. Brennan | 2002-09-24 |
| 6455902 | BiCMOS ESD circuit with subcollector/trench-isolated body mosfet for mixed signal analog/digital RF applications | — | 2002-09-24 |
| 6441410 | MOSFET with lateral resistor ballasting | Robert J. Gauthier, Jr., Randy W. Mann | 2002-08-27 |
| 6441462 | Self-aligned SiGe NPN with improved ESD robustness using wide emitter polysilicon extension | Louis D. Lanzerotti | 2002-08-27 |
| 6433609 | Double-gate low power SOI active clamp network for single power supply and multiple power supply applications | — | 2002-08-13 |
| 6433985 | ESD network with capacitor blocking element | Richard Q. Williams | 2002-08-13 |
| 6432809 | Method for improved passive thermal flow in silicon on insulator devices | William R. Tonti | 2002-08-13 |
| 6429045 | Structure and process for multi-chip chip attach with reduced risk of electrostatic discharge damage | Toshiharu Furukawa, Mark C. Hakey, Steven J. Holmes, David V. Horak, H. Bernhard Pogge +1 more | 2002-08-06 |
| 6429066 | Method for producing a polysilicon circuit element | Jeffrey S. Brown, Robert J. Gauthier, Jr. | 2002-08-06 |
| 6429482 | Halo-free non-rectifying contact on chip with halo source/drain diffusion | James A. Culp, Jawahar P. Nayak, Werner Rausch, Melanie J. Sherony, Noah Zamdmer | 2002-08-06 |
| 6429489 | Electrostatic discharge power clamp circuit | Alan B. Botula, David Hui | 2002-08-06 |
| 6426244 | Process of forming a thick oxide field effect transistor | Michael Hargrove, Mario M. Pelella | 2002-07-30 |
| 6420766 | Transistor having raised source and drain | Jeffrey S. Brown, James S. Dunn, Steven J. Holmes, David V. Horak, Robert K. Leidy | 2002-07-16 |
| 6420761 | Asymmetrical semiconductor device for ESD protection | Robert J. Gauthier, Jr. | 2002-07-16 |
| 6410962 | Structure for SOI wafers to avoid electrostatic discharge | Stephen F. Geissler | 2002-06-25 |
| 6411480 | Substrate pumped ESD network with trench structure | Robert J. Gauthier, Jr. | 2002-06-25 |
| 6404269 | Low power SOI ESD buffer driver networks having dynamic threshold MOSFETS | — | 2002-06-11 |
| 6404275 | Modified current mirror circuit for BiCMOS application | Stephen J. Ames | 2002-06-11 |
| 6396107 | Trench-defined silicon germanium ESD diode network | Ciaran J. Brennan, Douglas B. Hershberger, Mankoo Lee, Nicholas Theodore Schmidt | 2002-05-28 |
| 6387742 | Thermal conductivity enhanced semiconductor structures and fabrication processes | Robert J. Gauthier, Jr., Dominic J. Schepis, William R. Tonti | 2002-05-14 |
| 6384468 | Capacitor and method for forming same | Kerry Bernstein, Nicholas Theodore Schmidt, Anthony K. Stamper, Stephen A. St. Onge | 2002-05-07 |
| 6380570 | Gate overvoltage control networks | — | 2002-04-30 |