Issued Patents 2002
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6498058 | SOI pass-gate disturb solution | Edward J. Nowak, Minh H. Tong | 2002-12-24 |
| 6476445 | Method and structures for dual depth oxygen layers in silicon-on-insulator processes | Jeffrey S. Brown, Robert J. Gauthier, Jr., Randy W. Mann, Steven H. Voldman | 2002-11-05 |
| 6475838 | Methods for forming decoupling capacitors | William F. Clark, Jr., Edward J. Nowak, Minh H. Tong | 2002-11-05 |
| 6459106 | Dynamic threshold voltage devices with low gate to substrate resistance | Edward J. Nowak, Minh H. Tong | 2002-10-01 |
| 6453431 | System technique for detecting soft errors in statically coupled CMOS logic | Kerry Bernstein, William A. Klaasen, Wilbur D. Pricer | 2002-09-17 |
| 6437594 | SOI pass gate leakage monitor | Ronald J. Bolam, Edward J. Nowak, Minh H. Tong | 2002-08-20 |
| 6436744 | Method and structure for creating high density buried contact for use with SOI processes for high performance logic | Jerome B. Lasky, Edward J. Nowak, Jed H. Rankin, Minh H. Tong | 2002-08-20 |
| 6429056 | Dynamic threshold voltage devices with low gate to substrate resistance | Edward J. Nowak, Minh H. Tong | 2002-08-06 |
| 6404236 | Domino logic circuit having multiplicity of gate dielectric thicknesses | Kerry Bernstein, Robert J. Gauthier, Jr., Edward J. Nowak, Minh H. Tong | 2002-06-11 |
| 6400171 | Method and system for processing integrated circuits | William D. K. Clark, Edward J. Nowak, Minh H. Tong | 2002-06-04 |
| 6368903 | SOI low capacitance body contact | Randy W. Mann, Anthony K. Stamper | 2002-04-09 |
| 6339005 | Disposable spacer for symmetric and asymmetric Schottky contact to SOI MOSFET | Jerome B. Lasky, Effendi Leobandung, Dominic J. Schepis | 2002-01-15 |