Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6469939 | Flash memory device with increase of efficiency during an APDE (automatic program disturb after erase) process | Zhigang Wang, Richard Fastow, Sheung-Hee Park, Chi Chang | 2002-10-22 |
| 6465835 | Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate | Tuan Pham, Mark T. Ramsbey, Angela T. Hui | 2002-10-15 |
| 6455373 | Semiconductor device having gate edges protected from charge gain/loss | Tuan Pham, Mark T. Ramsbey, Angela T. Hui, Yu Sun, Chi Chang | 2002-09-24 |
| 6456531 | Method of drain avalanche programming of a non-volatile memory cell | Janet Wang | 2002-09-24 |
| 6452840 | Feedback method to optimize electric field during channel erase of flash memory devices | Ravi Sunkavalli, Lee Cleveland, Richard Fastow, Tim Thurgate | 2002-09-17 |
| 6448608 | Capping layer | Tuan Pham, Mark T. Ramsbey, Angela T. Hui | 2002-09-10 |
| 6438037 | Threshold voltage compacting for non-volatile semiconductor memory designs | Richard Fastow, Xin Guo | 2002-08-20 |
| 6410956 | Method and system for using a spacer to offset implant damage and reduce lateral diffusion in flash memory devices | Vei-Han Chan, Scott Luning, Mark Randolph, Nicholas H. Tripsas, Daniel Sobek +2 more | 2002-06-25 |
| 6400608 | Accurate verify apparatus and method for NOR flash memory cells in the presence of high column leakage | Richard Fastow, Lee Cleveland | 2002-06-04 |
| 6337246 | Method for inhibiting tunnel oxide growth at the edges of a floating gate during semiconductor device processing | Daniel Sobek, Timothy Thurgate, Carl Robert Huster, Tuan Pham, Mark T. Ramsbey | 2002-01-08 |