Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6477083 | Select transistor architecture for a virtual ground non-volatile memory cell array | Mark Randolph, Shane Hollmer | 2002-11-05 |
| 6469939 | Flash memory device with increase of efficiency during an APDE (automatic program disturb after erase) process | Zhigang Wang, Sheung-Hee Park, Sameer Haddad, Chi Chang | 2002-10-22 |
| 6452840 | Feedback method to optimize electric field during channel erase of flash memory devices | Ravi Sunkavalli, Lee Cleveland, Sameer Haddad, Tim Thurgate | 2002-09-17 |
| 6449188 | Low column leakage nor flash array-double cell implementation | — | 2002-09-10 |
| 6438037 | Threshold voltage compacting for non-volatile semiconductor memory designs | Xin Guo, Sameer Haddad | 2002-08-20 |
| 6438031 | Method of programming a non-volatile memory cell using a substrate bias | — | 2002-08-20 |
| 6400608 | Accurate verify apparatus and method for NOR flash memory cells in the presence of high column leakage | Sameer Haddad, Lee Cleveland | 2002-06-04 |
| 6363014 | Low column leakage NOR flash array-single cell implementation | — | 2002-03-26 |