Issued Patents 2002
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6465835 | Charge gain/charge loss junction leakage prevention for flash technology by using double isolation/capping layer between lightly doped drain and gate | Mark T. Ramsbey, Sameer Haddad, Angela T. Hui | 2002-10-15 |
| 6465303 | Method of manufacturing spacer etch mask for silicon-oxide-nitride-oxide-silicon (SONOS) type nonvolatile memory | Mark T. Ramsbey, Narbeh Derhacobian, Janet Wang, Angela T. Hui, Ravi Sunkavalli +1 more | 2002-10-15 |
| 6455373 | Semiconductor device having gate edges protected from charge gain/loss | Mark T. Ramsbey, Sameer Haddad, Angela T. Hui, Yu Sun, Chi Chang | 2002-09-24 |
| 6448608 | Capping layer | Mark T. Ramsbey, Sameer Haddad, Angela T. Hui | 2002-09-10 |
| 6399984 | Species implantation for minimizing interface defect density in flash memory devices | Yider Wu, Mark T. Ramsbey, Chi Chang, Yu Sun, Jean Y. Yang | 2002-06-04 |
| 6369416 | Semiconductor device with contacts having a sloped profile | Angela T. Hui, Mark T. Ramsbey, Yu Sun | 2002-04-09 |
| 6355514 | Dual bit isolation scheme for flash devices | — | 2002-03-12 |
| 6342415 | Method and system for providing reduced-sized contacts in a semiconductor device | Angela T. Hui, Mark T. Ramsbey, Yu Sun | 2002-01-29 |
| 6337246 | Method for inhibiting tunnel oxide growth at the edges of a floating gate during semiconductor device processing | Daniel Sobek, Timothy Thurgate, Carl Robert Huster, Mark T. Ramsbey, Sameer Haddad | 2002-01-08 |