Issued Patents 2002
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6426262 | Method of analyzing the effects of shadowing of angled halo implants | Mark B. Fuselier, Frederick N. Hause, Marilyn I. Wright | 2002-07-30 |
| 6417539 | High density memory cell assembly and methods | Mark I. Gardner, Derick J. Wristers | 2002-07-09 |
| 6406964 | Method of controlling junction recesses in a semiconductor device | Derick J. Wristers, John G. Pellerin | 2002-06-18 |
| 6403979 | Test structure for measuring effective channel length of a transistor | Daniel Kadosh | 2002-06-11 |
| 6399493 | Method of silicide formation by silicon pretreatment | Robert Dawson, John G. Pellerin | 2002-06-04 |
| 6383872 | Parallel and series-coupled transistors having gate conductors formed on sidewall surfaces of a sacrificial structure | Daniel Kadosh, Mark I. Gardner | 2002-05-07 |
| 6372587 | Angled halo implant tailoring using implant mask | Scott Luning, Derick J. Wristers | 2002-04-16 |
| 6359461 | Test structure for determining the properties of densely packed transistors | John J. Bush, H. Jim Fulford | 2002-03-19 |
| 6358803 | Method of fabricating a deep source/drain | Mark W. Michael | 2002-03-19 |
| 6346426 | Method and apparatus for characterizing semiconductor device performance variations based on independent critical dimension measurements | Anthony J. Toprac, Derick J. Wristers | 2002-02-12 |