Issued Patents 2002
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6420730 | Elevated transistor fabrication technique | Mark I. Gardner, Michael Duane | 2002-07-16 |
| 6403979 | Test structure for measuring effective channel length of a transistor | Jon D. Cheek | 2002-06-11 |
| 6383872 | Parallel and series-coupled transistors having gate conductors formed on sidewall surfaces of a sacrificial structure | Mark I. Gardner, Jon D. Cheek | 2002-05-07 |
| 6365943 | High density integrated circuit | Mark I. Gardner, Fred N. Hause | 2002-04-02 |
| 6358828 | Ultra high density series-connected transistors formed on separate elevational levels | Mark I. Gardner | 2002-03-19 |
| 6355955 | Transistor and a method for forming the transistor with elevated and/or relatively shallow source/drain regions to achieve enhanced gate electrode formation | Mark I. Gardner, H. Jim Fulford | 2002-03-12 |