Issued Patents 2002
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6433400 | Semiconductor fabrication employing barrier atoms incorporated at the edges of a trench isolation structure | Mark I. Gardner, H. Jim Fulford | 2002-08-13 |
| 6417539 | High density memory cell assembly and methods | Mark I. Gardner, Jon D. Cheek | 2002-07-09 |
| 6410409 | Implanted barrier layer for retarding upward diffusion of substrate dopant | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 2002-06-25 |
| 6406964 | Method of controlling junction recesses in a semiconductor device | Jon D. Cheek, John G. Pellerin | 2002-06-18 |
| 6380055 | Dopant diffusion-retarding barrier region formed within polysilicon gate layer | Mark I. Gardner, Robert Dawson, H. Jim Fulford, Frederick N. Hause, Mark W. Michael +1 more | 2002-04-30 |
| 6372588 | Method of making an IGFET using solid phase diffusion to dope the gate, source and drain | Robert Dawson, H. Jim Fulford, Mark I. Gardner, Frederick N. Hause, Mark W. Michael +1 more | 2002-04-16 |
| 6372587 | Angled halo implant tailoring using implant mask | Jon D. Cheek, Scott Luning | 2002-04-16 |
| 6346426 | Method and apparatus for characterizing semiconductor device performance variations based on independent critical dimension measurements | Anthony J. Toprac, Jon D. Cheek | 2002-02-12 |